diff --git a/projects/pzsdr1/ccbox_lvds/system_top.v b/projects/pzsdr1/ccbox_lvds/system_top.v index 2c806a77e..1a3544efc 100644 --- a/projects/pzsdr1/ccbox_lvds/system_top.v +++ b/projects/pzsdr1/ccbox_lvds/system_top.v @@ -97,6 +97,17 @@ module system_top ( input [ 2:0] pss_valid_n, inout [ 2:0] adp5061_io, + inout tsw_rot_com_a, + inout tsw_dir_com_b, + inout tsw_rot_s1, + inout tsw_rot_a, + inout tsw_rot_b, + inout tsw_rot_misc, + inout tsw_dir_s2, + inout tsw_dir_s3, + inout tsw_dir_s4, + inout tsw_dir_s5, + inout ltc2955_kill_n, inout ltc2955_int_n, inout mic_present_n, @@ -204,11 +215,24 @@ module system_top ( assign switch_led_b = gpio_o[0]; assign gpio_i[3:0] = gpio_o[3:0]; - // ad9361 gpio - 63-32 + // ad9361 gpio - tact-scroll-wheel + + ad_iobuf #(.DATA_WIDTH(10)) i_iobuf_tsw ( + .dio_t ({gpio_t[63:62], gpio_t[60:57], gpio_t[50:47]}), + .dio_i ({gpio_o[63:62], gpio_o[60:57], gpio_o[50:47]}), + .dio_o ({gpio_i[63:62], gpio_i[60:57], gpio_i[50:47]}), + .dio_p ({ tsw_rot_com_a, // 63 + tsw_dir_com_b, // 62 + tsw_rot_s1, // 60 + tsw_rot_a, // 59 + tsw_rot_b, // 58 + tsw_rot_misc, // 57 + tsw_dir_s2, // 50 + tsw_dir_s3, // 49 + tsw_dir_s4, // 48 + tsw_dir_s5})); // 47 - assign gpio_i[63:62] = gpio_o[63:62]; - assign gpio_i[60:57] = gpio_o[60:57]; - assign gpio_i[50:47] = gpio_o[50:47]; + // ad9361 gpio - 63-32 ad_iobuf #(.DATA_WIDTH(22)) i_iobuf ( .dio_t ({gpio_t[61:61], gpio_t[56:51], gpio_t[46:32]}), diff --git a/projects/pzsdr1/common/ccbox_constr.xdc b/projects/pzsdr1/common/ccbox_constr.xdc index a21d62099..53b8be691 100644 --- a/projects/pzsdr1/common/ccbox_constr.xdc +++ b/projects/pzsdr1/common/ccbox_constr.xdc @@ -70,3 +70,16 @@ set_property -dict {PACKAGE_PIN V13 IOSTANDARD LVCMOS25} [get_ports pss_va set_property -dict {PACKAGE_PIN V12 IOSTANDARD LVCMOS25} [get_ports pss_valid_n[1]] ; ## U1,V12,IO_L04_34_JX4_P,JX4,26,PSS_VALID2_N set_property -dict {PACKAGE_PIN W13 IOSTANDARD LVCMOS25} [get_ports pss_valid_n[2]] ; ## U1,W13,IO_L04_34_JX4_N,JX4,28,PSS_VALID3_N +## tsw + +set_property -dict {PACKAGE_PIN V16 IOSTANDARD LVCMOS25} [get_ports tsw_rot_com_a] ; ## U1,V16,IO_L18_34_JX4_P,JX4,68,TSW_COM_A +set_property -dict {PACKAGE_PIN W16 IOSTANDARD LVCMOS25} [get_ports tsw_rot_s1] ; ## U1,W16,IO_L18_34_JX4_N,JX4,70,TSW_S1 +set_property -dict {PACKAGE_PIN R16 IOSTANDARD LVCMOS25} [get_ports tsw_rot_a] ; ## U1,R16,IO_L19_34_JX4_P,JX4,73,TSW_A +set_property -dict {PACKAGE_PIN R17 IOSTANDARD LVCMOS25} [get_ports tsw_rot_b] ; ## U1,R17,IO_L19_34_JX4_N,JX4,75,TSW_B +set_property -dict {PACKAGE_PIN T17 IOSTANDARD LVCMOS25} [get_ports tsw_rot_misc] ; ## U1,T17,IO_L20_34_JX4_P,JX4,74,TSW_? +set_property -dict {PACKAGE_PIN R18 IOSTANDARD LVCMOS25} [get_ports tsw_dir_com_b] ; ## U1,R18,IO_L20_34_JX4_N,JX4,76,TSW_COM_B +set_property -dict {PACKAGE_PIN V17 IOSTANDARD LVCMOS25} [get_ports tsw_dir_s2] ; ## U1,V17,IO_L21_34_JX4_P,JX4,77,TSW_S2 +set_property -dict {PACKAGE_PIN V18 IOSTANDARD LVCMOS25} [get_ports tsw_dir_s3] ; ## U1,V18,IO_L21_34_JX4_N,JX4,79,TSW_S3 +set_property -dict {PACKAGE_PIN W18 IOSTANDARD LVCMOS25} [get_ports tsw_dir_s4] ; ## U1,W18,IO_L22_34_JX4_P,JX4,78,TSW_S4 +set_property -dict {PACKAGE_PIN W19 IOSTANDARD LVCMOS25} [get_ports tsw_dir_s5] ; ## U1,W19,IO_L22_34_JX4_N,JX4,80,TSW_S5 + diff --git a/projects/pzsdr2/ccbox_lvds/system_top.v b/projects/pzsdr2/ccbox_lvds/system_top.v index a7ab38b4e..1fcddd3f5 100644 --- a/projects/pzsdr2/ccbox_lvds/system_top.v +++ b/projects/pzsdr2/ccbox_lvds/system_top.v @@ -97,6 +97,17 @@ module system_top ( input [ 2:0] pss_valid_n, inout [ 2:0] adp5061_io, + inout tsw_rot_com_a, + inout tsw_dir_com_b, + inout tsw_rot_s1, + inout tsw_rot_a, + inout tsw_rot_b, + inout tsw_rot_misc, + inout tsw_dir_s2, + inout tsw_dir_s3, + inout tsw_dir_s4, + inout tsw_dir_s5, + inout otg_ctrl, inout adp1614_en, inout ltc2955_kill_n, @@ -208,11 +219,24 @@ module system_top ( assign switch_led_b = gpio_o[0]; assign gpio_i[3:0] = gpio_o[3:0]; - // ad9361 gpio - 63-32 + // ad9361 gpio - tact-scroll-wheel + + ad_iobuf #(.DATA_WIDTH(10)) i_iobuf_tsw ( + .dio_t ({gpio_t[63:62], gpio_t[60:57], gpio_t[50:47]}), + .dio_i ({gpio_o[63:62], gpio_o[60:57], gpio_o[50:47]}), + .dio_o ({gpio_i[63:62], gpio_i[60:57], gpio_i[50:47]}), + .dio_p ({ tsw_rot_com_a, // 63 + tsw_dir_com_b, // 62 + tsw_rot_s1, // 60 + tsw_rot_a, // 59 + tsw_rot_b, // 58 + tsw_rot_misc, // 57 + tsw_dir_s2, // 50 + tsw_dir_s3, // 49 + tsw_dir_s4, // 48 + tsw_dir_s5})); // 47 - assign gpio_i[63:62] = gpio_o[63:62]; - assign gpio_i[60:57] = gpio_o[60:57]; - assign gpio_i[50:47] = gpio_o[50:47]; + // ad9361 gpio - 63-32 ad_iobuf #(.DATA_WIDTH(22)) i_iobuf ( .dio_t ({gpio_t[61:61], gpio_t[56:51], gpio_t[46:32]}), diff --git a/projects/pzsdr2/common/ccbox_constr.xdc b/projects/pzsdr2/common/ccbox_constr.xdc index 94ffc8f27..3cf4cf8be 100644 --- a/projects/pzsdr2/common/ccbox_constr.xdc +++ b/projects/pzsdr2/common/ccbox_constr.xdc @@ -70,6 +70,19 @@ set_property -dict {PACKAGE_PIN G9 IOSTANDARD LVCMOS18} [get_ports pss_va set_property -dict {PACKAGE_PIN H7 IOSTANDARD LVCMOS18} [get_ports pss_valid_n[1]] ; ## U1,H7,IO_L04_34_JX4_P,JX4,26,PSS_VALID2_N set_property -dict {PACKAGE_PIN H6 IOSTANDARD LVCMOS18} [get_ports pss_valid_n[2]] ; ## U1,H6,IO_L04_34_JX4_N,JX4,28,PSS_VALID3_N +## tsw + +set_property -dict {PACKAGE_PIN B7 IOSTANDARD LVCMOS18} [get_ports tsw_rot_com_a] ; ## U1,B7,IO_L18_34_JX4_P,JX4,68,TSW_COM_A +set_property -dict {PACKAGE_PIN A7 IOSTANDARD LVCMOS18} [get_ports tsw_rot_s1] ; ## U1,A7,IO_L18_34_JX4_N,JX4,70,TSW_S1 +set_property -dict {PACKAGE_PIN C4 IOSTANDARD LVCMOS18} [get_ports tsw_rot_a] ; ## U1,C4,IO_L19_34_JX4_P,JX4,73,TSW_A +set_property -dict {PACKAGE_PIN C3 IOSTANDARD LVCMOS18} [get_ports tsw_rot_b] ; ## U1,C3,IO_L19_34_JX4_N,JX4,75,TSW_B +set_property -dict {PACKAGE_PIN B5 IOSTANDARD LVCMOS18} [get_ports tsw_rot_misc] ; ## U1,B5,IO_L20_34_JX4_P,JX4,74,TSW_? +set_property -dict {PACKAGE_PIN B4 IOSTANDARD LVCMOS18} [get_ports tsw_dir_com_b] ; ## U1,B4,IO_L20_34_JX4_N,JX4,76,TSW_COM_B +set_property -dict {PACKAGE_PIN B6 IOSTANDARD LVCMOS18} [get_ports tsw_dir_s2] ; ## U1,B6,IO_L21_34_JX4_P,JX4,77,TSW_S2 +set_property -dict {PACKAGE_PIN A5 IOSTANDARD LVCMOS18} [get_ports tsw_dir_s3] ; ## U1,A5,IO_L21_34_JX4_N,JX4,79,TSW_S3 +set_property -dict {PACKAGE_PIN A4 IOSTANDARD LVCMOS18} [get_ports tsw_dir_s4] ; ## U1,A4,IO_L22_34_JX4_P,JX4,78,TSW_S4 +set_property -dict {PACKAGE_PIN A3 IOSTANDARD LVCMOS18} [get_ports tsw_dir_s5] ; ## U1,A3,IO_L22_34_JX4_N,JX4,80,TSW_S5 + ## misc set_property -dict {PACKAGE_PIN AC16 IOSTANDARD LVCMOS25} [get_ports otg_ctrl] ; ## U1,AC16,IO_L21_12_JX2_N,JX2,95,OTG_CTRL