docs: Fix tables consistency

docs/projects/ad7616_sdz/index.rst

@@ -152,12 +152,12 @@ I2C connections
      - iic_fmc
      - axi_iic_fmc
      - 0x4162_0000
-     - \-
+     - ---
    * - PL
      - iic_main
      - axi_iic_main
      - 0x4160_0000
-     - \-
+     - ---
 
 SPI connections
 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@@ -324,7 +324,7 @@ HDL related
      - Documentation link
    * - AD_EDGE_DETECT
      - :git-hdl:`library/common/ad_edge_detect.v`
-     -
+     - ---
    * - AXI_AD7616
      - :git-hdl:`library/axi_ad7616` *
      - :dokuwiki:`[Wiki] <resources/fpga/docs/axi_ad7616>`
@@ -339,13 +339,13 @@ HDL related
      - :dokuwiki:`[Wiki] <resources/fpga/docs/axi_hdmi_tx>`
    * - AXI_I2S_ADI
      - :git-hdl:`library/axi_i2s_adi`
-     -
+     - ---
    * - AXI_PWM_GEN
      - :git-hdl:`library/axi_pwm_gen`
      - :dokuwiki:`[Wiki] <resources/fpga/docs/axi_pwm_gen>`
    * - AXI_SPDIF_TX
      - :git-hdl:`library/axi_spdif_tx`
-     -
+     - ---
    * - AXI_SPI_ENGINE
      - :git-hdl:`library/spi_engine/axi_spi_engine`  **
      - :ref:`here <spi_engine axi>`
@@ -363,7 +363,7 @@ HDL related
      - :ref:`here <spi_engine offload>`
    * - SYNC_BITS
      - :git-hdl:`library/util_cdc/sync_bits.v`
-     - 
+     - ---
    * - SYSID_ROM
      - :git-hdl:`library/sysid_rom`
      - :dokuwiki:`[Wiki] <resources/fpga/docs/axi_sysid>`

docs/projects/ad9081_fmca_ebz/index.rst

@@ -728,26 +728,26 @@ HDL related
      - :git-hdl:`library/util_pack/util_upack2`
      - :dokuwiki:`[Wiki] <resources/fpga/docs/util_upack>`
    * - UTIL_ADXCVR for AMD
-     -  :git-hdl:`library/xilinx/util_adxcvr`
-     -  :dokuwiki:`[Wiki] <resources/fpga/docs/util_xcvr>`
+     - :git-hdl:`library/xilinx/util_adxcvr`
+     - :dokuwiki:`[Wiki] <resources/fpga/docs/util_xcvr>`
    * - AXI_ADXCVR for Intel
-     -  :git-hdl:`library/intel/axi_adxcvr`
-     -  :dokuwiki:`[Wiki] <resources/fpga/docs/axi_adxcvr>`
+     - :git-hdl:`library/intel/axi_adxcvr`
+     - :dokuwiki:`[Wiki] <resources/fpga/docs/axi_adxcvr>`
    * - AXI_ADXCVR for AMD
-     -  :git-hdl:`library/xilinx/axi_adxcvr`
-     -  :dokuwiki:`[Wiki] <resources/fpga/docs/axi_adxcvr>`
+     - :git-hdl:`library/xilinx/axi_adxcvr`
+     - :dokuwiki:`[Wiki] <resources/fpga/docs/axi_adxcvr>`
    * - AXI_JESD204_RX
-     -  :git-hdl:`library/jesd204/axi_jesd204_rx`
-     -  :dokuwiki:`[Wiki] <resources/fpga/peripherals/jesd204/axi_jesd204_rx>`
+     - :git-hdl:`library/jesd204/axi_jesd204_rx`
+     - :dokuwiki:`[Wiki] <resources/fpga/peripherals/jesd204/axi_jesd204_rx>`
    * - AXI_JESD204_TX
-     -  :git-hdl:`library/jesd204/axi_jesd204_tx`
-     -  :dokuwiki:`[Wiki] <resources/fpga/peripherals/jesd204/axi_jesd204_tx>`
+     - :git-hdl:`library/jesd204/axi_jesd204_tx`
+     - :dokuwiki:`[Wiki] <resources/fpga/peripherals/jesd204/axi_jesd204_tx>`
    * - JESD204_TPL_ADC
-     -  :git-hdl:`library/jesd204/ad_ip_jesd204_tpl_adc`
-     -  :dokuwiki:`[Wiki] <resources/fpga/peripherals/jesd204/jesd204_tpl_adc>`
+     - :git-hdl:`library/jesd204/ad_ip_jesd204_tpl_adc`
+     - :dokuwiki:`[Wiki] <resources/fpga/peripherals/jesd204/jesd204_tpl_adc>`
    * - JESD204_TPL_DAC
-     -  :git-hdl:`library/jesd204/ad_ip_jesd204_tpl_dac`
-     -  :dokuwiki:`[Wiki] <resources/fpga/peripherals/jesd204/jesd204_tpl_dac>`
+     - :git-hdl:`library/jesd204/ad_ip_jesd204_tpl_dac`
+     - :dokuwiki:`[Wiki] <resources/fpga/peripherals/jesd204/jesd204_tpl_dac>`
 
 -  :dokuwiki:`[Wiki] Generic JESD204B block designs <resources/fpga/docs/hdl/generic_jesd_bds>`
 -  :dokuwiki:`[Wiki] JESD204B High-Speed Serial Interface Support <resources/fpga/peripherals/jesd204>`

docs/projects/template/index.rst

@@ -681,26 +681,26 @@ HDL related
      - :git-hdl:`library/util_pack/util_upack2`
      - :dokuwiki:`[Wiki] <resources/fpga/docs/util_upack>`
    * - UTIL_ADXCVR for AMD
-     -  :git-hdl:`library/xilinx/util_adxcvr`
-     -  :dokuwiki:`[Wiki] <resources/fpga/docs/util_xcvr>`
+     - :git-hdl:`library/xilinx/util_adxcvr`
+     - :dokuwiki:`[Wiki] <resources/fpga/docs/util_xcvr>`
    * - AXI_ADXCVR for Intel
-     -  :git-hdl:`library/intel/axi_adxcvr`
-     -  :dokuwiki:`[Wiki] <resources/fpga/docs/axi_adxcvr>`
+     - :git-hdl:`library/intel/axi_adxcvr`
+     - :dokuwiki:`[Wiki] <resources/fpga/docs/axi_adxcvr>`
    * - AXI_ADXCVR for AMD
-     -  :git-hdl:`library/xilinx/axi_adxcvr`
-     -  :dokuwiki:`[Wiki] <resources/fpga/docs/axi_adxcvr>`
+     - :git-hdl:`library/xilinx/axi_adxcvr`
+     - :dokuwiki:`[Wiki] <resources/fpga/docs/axi_adxcvr>`
    * - AXI_JESD204_RX
-     -  :git-hdl:`library/jesd204/axi_jesd204_rx`
-     -  :dokuwiki:`[Wiki] <resources/fpga/peripherals/jesd204/axi_jesd204_rx>`
+     - :git-hdl:`library/jesd204/axi_jesd204_rx`
+     - :dokuwiki:`[Wiki] <resources/fpga/peripherals/jesd204/axi_jesd204_rx>`
    * - AXI_JESD204_TX
-     -  :git-hdl:`library/jesd204/axi_jesd204_tx`
-     -  :dokuwiki:`[Wiki] <resources/fpga/peripherals/jesd204/axi_jesd204_tx>`
+     - :git-hdl:`library/jesd204/axi_jesd204_tx`
+     - :dokuwiki:`[Wiki] <resources/fpga/peripherals/jesd204/axi_jesd204_tx>`
    * - JESD204_TPL_ADC
-     -  :git-hdl:`library/jesd204/ad_ip_jesd204_tpl_adc`
-     -  :dokuwiki:`[Wiki] <resources/fpga/peripherals/jesd204/jesd204_tpl_adc>`
+     - :git-hdl:`library/jesd204/ad_ip_jesd204_tpl_adc`
+     - :dokuwiki:`[Wiki] <resources/fpga/peripherals/jesd204/jesd204_tpl_adc>`
    * - JESD204_TPL_DAC
-     -  :git-hdl:`library/jesd204/ad_ip_jesd204_tpl_dac`
-     -  :dokuwiki:`[Wiki] <resources/fpga/peripherals/jesd204/jesd204_tpl_dac>`
+     - :git-hdl:`library/jesd204/ad_ip_jesd204_tpl_dac`
+     - :dokuwiki:`[Wiki] <resources/fpga/peripherals/jesd204/jesd204_tpl_dac>`
 
 -  :dokuwiki:`[Wiki] Generic JESD204B block designs <resources/fpga/docs/hdl/generic_jesd_bds>`
 -  :dokuwiki:`[Wiki] JESD204B High-Speed Serial Interface Support <resources/fpga/peripherals/jesd204>`