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adrv9009zu11eg: Add axi_sysid

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Adrian Costina 2019-11-06 16:20:28 +00:00
parent 81d3a9eb66
commit dfe3258a4f
3 changed files with 20 additions and 3 deletions
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7
projects/adrv9009zu11eg/adrv2crr_fmc/Makefile
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@ -5,24 +5,25 @@
PROJECT_NAME := adrv9009zu11eg PROJECT_NAME := adrv9009zu11eg
M_DEPS += ../common/adrv2crr_fmc_bd.tcl
M_DEPS += ../common/adrv9009zu11eg_spi.v M_DEPS += ../common/adrv9009zu11eg_spi.v
M_DEPS += ../common/adrv9009zu11eg_constr.xdc
M_DEPS += ../common/adrv9009zu11eg_bd.tcl M_DEPS += ../common/adrv9009zu11eg_bd.tcl
M_DEPS += ../common/adrv2crr_fmc_constr.xdc M_DEPS += ../common/adrv2crr_fmc_constr.xdc
M_DEPS += ../common/adrv9009zu11eg_constr.xdc M_DEPS += ../common/adrv2crr_fmc_bd.tcl
M_DEPS += ../../../library/xilinx/common/ad_iobuf.v M_DEPS += ../../../library/xilinx/common/ad_iobuf.v
M_DEPS += ../../../library/jesd204/scripts/jesd204.tcl M_DEPS += ../../../library/jesd204/scripts/jesd204.tcl
LIB_DEPS += axi_clkgen
LIB_DEPS += axi_dmac LIB_DEPS += axi_dmac
LIB_DEPS += axi_fan_control LIB_DEPS += axi_fan_control
LIB_DEPS += axi_i2s_adi LIB_DEPS += axi_i2s_adi
LIB_DEPS += axi_sysid
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_adc LIB_DEPS += jesd204/ad_ip_jesd204_tpl_adc
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_dac LIB_DEPS += jesd204/ad_ip_jesd204_tpl_dac
LIB_DEPS += jesd204/axi_jesd204_rx LIB_DEPS += jesd204/axi_jesd204_rx
LIB_DEPS += jesd204/axi_jesd204_tx LIB_DEPS += jesd204/axi_jesd204_tx
LIB_DEPS += jesd204/jesd204_rx LIB_DEPS += jesd204/jesd204_rx
LIB_DEPS += jesd204/jesd204_tx LIB_DEPS += jesd204/jesd204_tx
LIB_DEPS += sysid_rom
LIB_DEPS += util_pack/util_cpack2 LIB_DEPS += util_pack/util_cpack2
LIB_DEPS += util_pack/util_upack2 LIB_DEPS += util_pack/util_upack2
LIB_DEPS += xilinx/axi_adxcvr LIB_DEPS += xilinx/axi_adxcvr

6
projects/adrv9009zu11eg/adrv2crr_fmc/system_bd.tcl
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@ -1,3 +1,9 @@
source ../common/adrv9009zu11eg_bd.tcl source ../common/adrv9009zu11eg_bd.tcl
source ../common/adrv2crr_fmc_bd.tcl source ../common/adrv2crr_fmc_bd.tcl
ad_ip_parameter axi_sysid_0 CONFIG.ROM_ADDR_BITS 9
ad_ip_parameter rom_sys_0 CONFIG.PATH_TO_FILE "[pwd]/mem_init_sys.txt"
ad_ip_parameter rom_sys_0 CONFIG.ROM_ADDR_BITS 9
set sys_cstring "sys rom custom string placeholder"
sysid_gen_sys_init_file $sys_cstring

10
projects/adrv9009zu11eg/common/adrv9009zu11eg_bd.tcl
View File

@ -118,6 +118,15 @@ ad_connect sys_ps8/emio_spi0_ss_i_n VCC
ad_connect sys_ps8/emio_spi0_sclk_i GND ad_connect sys_ps8/emio_spi0_sclk_i GND
ad_connect sys_ps8/emio_spi0_s_i GND ad_connect sys_ps8/emio_spi0_s_i GND
#system ID
ad_ip_instance axi_sysid axi_sysid_0
ad_ip_instance sysid_rom rom_sys_0
ad_connect axi_sysid_0/rom_addr rom_sys_0/rom_addr
ad_connect axi_sysid_0/sys_rom_data rom_sys_0/rom_data
ad_connect sys_cpu_clk rom_sys_0/clk
# interrupts # interrupts
ad_ip_instance xlconcat sys_concat_intc_0 ad_ip_instance xlconcat sys_concat_intc_0
@ -443,6 +452,7 @@ ad_cpu_interconnect 0x44A70000 axi_adrv9009_som_obs_jesd
ad_cpu_interconnect 0x7c400000 axi_adrv9009_som_tx_dma ad_cpu_interconnect 0x7c400000 axi_adrv9009_som_tx_dma
ad_cpu_interconnect 0x7c420000 axi_adrv9009_som_rx_dma ad_cpu_interconnect 0x7c420000 axi_adrv9009_som_rx_dma
ad_cpu_interconnect 0x7c440000 axi_adrv9009_som_obs_dma ad_cpu_interconnect 0x7c440000 axi_adrv9009_som_obs_dma
ad_cpu_interconnect 0x45000000 axi_sysid_0
# gt uses hp0, and 100MHz clock for both DRP and AXI4 # gt uses hp0, and 100MHz clock for both DRP and AXI4