From e2a111d74bdcc055cc78409074346977a0f8452b Mon Sep 17 00:00:00 2001
From: Laszlo Nagy <laszlo.nagy@analog.com>
Date: Tue, 2 Mar 2021 12:30:57 +0000
Subject: [PATCH] jesd204/ad_ip_jesd204_tpl_dac: Drop LSBs from wider bus to be
 compatible with previous implementations

Add selectable synthesis option for dropping LSBs or MSBs
---
 .../ad_ip_jesd204_tpl_dac/ad_ip_jesd204_tpl_dac.v      | 10 ++++++++--
 .../ad_ip_jesd204_tpl_dac_regmap.v                     |  4 +++-
 2 files changed, 11 insertions(+), 3 deletions(-)

diff --git a/library/jesd204/ad_ip_jesd204_tpl_dac/ad_ip_jesd204_tpl_dac.v b/library/jesd204/ad_ip_jesd204_tpl_dac/ad_ip_jesd204_tpl_dac.v
index ee162b1f1..ce6fa3652 100644
--- a/library/jesd204/ad_ip_jesd204_tpl_dac/ad_ip_jesd204_tpl_dac.v
+++ b/library/jesd204/ad_ip_jesd204_tpl_dac/ad_ip_jesd204_tpl_dac.v
@@ -35,6 +35,7 @@ module ad_ip_jesd204_tpl_dac #(
   parameter CONVERTER_RESOLUTION = 16, // JESD_N
   parameter BITS_PER_SAMPLE = 16,      // JESD_NP
   parameter DMA_BITS_PER_SAMPLE = 16,
+  parameter PADDING_TO_MSB_LSB_N = 0,
   parameter OCTETS_PER_BEAT = 4,
   parameter DDS_TYPE = 1,
   parameter DDS_CORDIC_DW = 16,
@@ -135,6 +136,7 @@ module ad_ip_jesd204_tpl_dac #(
     .DEV_PACKAGE (DEV_PACKAGE),
     .NUM_CHANNELS (NUM_CHANNELS),
     .DATA_PATH_WIDTH (DATA_PATH_WIDTH),
+    .PADDING_TO_MSB_LSB_N (PADDING_TO_MSB_LSB_N),
     .NUM_PROFILES(1)
   ) i_regmap (
     .s_axi_aclk (s_axi_aclk),
@@ -248,11 +250,15 @@ module ad_ip_jesd204_tpl_dac #(
 
   );
 
-  // Drop DMA padding bits from the MSB
+  // Drop DMA padding bits from the LSB or MSB based on configuration
   integer i;
   always @(*) begin
     for (i=0;i<NUM_CHANNELS*DATA_PATH_WIDTH;i=i+1) begin
-      dac_ddata_cr[i*BITS_PER_SAMPLE +: BITS_PER_SAMPLE] = dac_ddata[i*DMA_BITS_PER_SAMPLE +: BITS_PER_SAMPLE];
+      if (PADDING_TO_MSB_LSB_N==1) begin
+        dac_ddata_cr[i*BITS_PER_SAMPLE +: BITS_PER_SAMPLE] = dac_ddata[i*DMA_BITS_PER_SAMPLE +: BITS_PER_SAMPLE];
+      end else begin
+        dac_ddata_cr[i*BITS_PER_SAMPLE +: BITS_PER_SAMPLE] = dac_ddata[((i+1)*DMA_BITS_PER_SAMPLE)-1 -: BITS_PER_SAMPLE];
+      end
     end
   end
 
diff --git a/library/jesd204/ad_ip_jesd204_tpl_dac/ad_ip_jesd204_tpl_dac_regmap.v b/library/jesd204/ad_ip_jesd204_tpl_dac/ad_ip_jesd204_tpl_dac_regmap.v
index 3b944b769..949e2ad25 100644
--- a/library/jesd204/ad_ip_jesd204_tpl_dac/ad_ip_jesd204_tpl_dac_regmap.v
+++ b/library/jesd204/ad_ip_jesd204_tpl_dac/ad_ip_jesd204_tpl_dac_regmap.v
@@ -34,6 +34,7 @@ module ad_ip_jesd204_tpl_dac_regmap #(
   parameter DEV_PACKAGE = 0,
   parameter NUM_CHANNELS = 2,
   parameter DATA_PATH_WIDTH = 16,
+  parameter PADDING_TO_MSB_LSB_N = 0,
   parameter NUM_PROFILES = 1    // Number of supported JESD profiles
 ) (
   input s_axi_aclk,
@@ -188,7 +189,8 @@ module ad_ip_jesd204_tpl_dac_regmap #(
 
   // dac common processor interface
   //
-  localparam CONFIG = (XBAR_ENABLE << 10) |
+  localparam CONFIG = (PADDING_TO_MSB_LSB_N << 11) |
+                      (XBAR_ENABLE << 10) |
                       (DATAPATH_DISABLE << 6) |
                       (IQCORRECTION_DISABLE << 0);