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jesd204/ad_ip_jesd204_tpl_dac: Drop LSBs from wider bus to be compatible with previous implementations 

Add selectable synthesis option for dropping LSBs or MSBs
main
Laszlo Nagy 2021-03-02 12:30:57 +00:00 committed by Laszlo Nagy
parent 69bb9df515
commit e2a111d74b
2 changed files with 11 additions and 3 deletions
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10
library/jesd204/ad_ip_jesd204_tpl_dac/ad_ip_jesd204_tpl_dac.v
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@ -35,6 +35,7 @@ module ad_ip_jesd204_tpl_dac #(
parameter CONVERTER_RESOLUTION = 16, // JESD_N parameter CONVERTER_RESOLUTION = 16, // JESD_N
parameter BITS_PER_SAMPLE = 16, // JESD_NP parameter BITS_PER_SAMPLE = 16, // JESD_NP
parameter DMA_BITS_PER_SAMPLE = 16, parameter DMA_BITS_PER_SAMPLE = 16,
parameter PADDING_TO_MSB_LSB_N = 0,
parameter OCTETS_PER_BEAT = 4, parameter OCTETS_PER_BEAT = 4,
parameter DDS_TYPE = 1, parameter DDS_TYPE = 1,
parameter DDS_CORDIC_DW = 16, parameter DDS_CORDIC_DW = 16,
@ -135,6 +136,7 @@ module ad_ip_jesd204_tpl_dac #(
.DEV_PACKAGE (DEV_PACKAGE), .DEV_PACKAGE (DEV_PACKAGE),
.NUM_CHANNELS (NUM_CHANNELS), .NUM_CHANNELS (NUM_CHANNELS),
.DATA_PATH_WIDTH (DATA_PATH_WIDTH), .DATA_PATH_WIDTH (DATA_PATH_WIDTH),
.PADDING_TO_MSB_LSB_N (PADDING_TO_MSB_LSB_N),
.NUM_PROFILES(1) .NUM_PROFILES(1)
) i_regmap ( ) i_regmap (
.s_axi_aclk (s_axi_aclk), .s_axi_aclk (s_axi_aclk),
@ -248,11 +250,15 @@ module ad_ip_jesd204_tpl_dac #(
); );
// Drop DMA padding bits from the MSB // Drop DMA padding bits from the LSB or MSB based on configuration
integer i; integer i;
always @(*) begin always @(*) begin
for (i=0;i<NUM_CHANNELS*DATA_PATH_WIDTH;i=i+1) begin for (i=0;i<NUM_CHANNELS*DATA_PATH_WIDTH;i=i+1) begin
dac_ddata_cr[i*BITS_PER_SAMPLE +: BITS_PER_SAMPLE] = dac_ddata[i*DMA_BITS_PER_SAMPLE +: BITS_PER_SAMPLE]; if (PADDING_TO_MSB_LSB_N==1) begin
dac_ddata_cr[i*BITS_PER_SAMPLE +: BITS_PER_SAMPLE] = dac_ddata[i*DMA_BITS_PER_SAMPLE +: BITS_PER_SAMPLE];
end else begin
dac_ddata_cr[i*BITS_PER_SAMPLE +: BITS_PER_SAMPLE] = dac_ddata[((i+1)*DMA_BITS_PER_SAMPLE)-1 -: BITS_PER_SAMPLE];
end
end end
end end

4
library/jesd204/ad_ip_jesd204_tpl_dac/ad_ip_jesd204_tpl_dac_regmap.v
View File

@ -34,6 +34,7 @@ module ad_ip_jesd204_tpl_dac_regmap #(
parameter DEV_PACKAGE = 0, parameter DEV_PACKAGE = 0,
parameter NUM_CHANNELS = 2, parameter NUM_CHANNELS = 2,
parameter DATA_PATH_WIDTH = 16, parameter DATA_PATH_WIDTH = 16,
parameter PADDING_TO_MSB_LSB_N = 0,
parameter NUM_PROFILES = 1 // Number of supported JESD profiles parameter NUM_PROFILES = 1 // Number of supported JESD profiles
) ( ) (
input s_axi_aclk, input s_axi_aclk,
@ -188,7 +189,8 @@ module ad_ip_jesd204_tpl_dac_regmap #(
// dac common processor interface // dac common processor interface
// //
localparam CONFIG = (XBAR_ENABLE << 10) | localparam CONFIG = (PADDING_TO_MSB_LSB_N << 11) |
(XBAR_ENABLE << 10) |
(DATAPATH_DISABLE << 6) | (DATAPATH_DISABLE << 6) |
(IQCORRECTION_DISABLE << 0); (IQCORRECTION_DISABLE << 0);