jesd204/ad_ip_jesd204_tpl_dac: Drop LSBs from wider bus to be compatible with previous implementations
Add selectable synthesis option for dropping LSBs or MSBsmain
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69bb9df515
commit
e2a111d74b
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@ -35,6 +35,7 @@ module ad_ip_jesd204_tpl_dac #(
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parameter CONVERTER_RESOLUTION = 16, // JESD_N
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parameter BITS_PER_SAMPLE = 16, // JESD_NP
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parameter DMA_BITS_PER_SAMPLE = 16,
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parameter PADDING_TO_MSB_LSB_N = 0,
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parameter OCTETS_PER_BEAT = 4,
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parameter DDS_TYPE = 1,
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parameter DDS_CORDIC_DW = 16,
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@ -135,6 +136,7 @@ module ad_ip_jesd204_tpl_dac #(
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.DEV_PACKAGE (DEV_PACKAGE),
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.NUM_CHANNELS (NUM_CHANNELS),
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.DATA_PATH_WIDTH (DATA_PATH_WIDTH),
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.PADDING_TO_MSB_LSB_N (PADDING_TO_MSB_LSB_N),
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.NUM_PROFILES(1)
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) i_regmap (
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.s_axi_aclk (s_axi_aclk),
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@ -248,11 +250,15 @@ module ad_ip_jesd204_tpl_dac #(
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);
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// Drop DMA padding bits from the MSB
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// Drop DMA padding bits from the LSB or MSB based on configuration
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integer i;
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always @(*) begin
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for (i=0;i<NUM_CHANNELS*DATA_PATH_WIDTH;i=i+1) begin
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dac_ddata_cr[i*BITS_PER_SAMPLE +: BITS_PER_SAMPLE] = dac_ddata[i*DMA_BITS_PER_SAMPLE +: BITS_PER_SAMPLE];
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if (PADDING_TO_MSB_LSB_N==1) begin
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dac_ddata_cr[i*BITS_PER_SAMPLE +: BITS_PER_SAMPLE] = dac_ddata[i*DMA_BITS_PER_SAMPLE +: BITS_PER_SAMPLE];
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end else begin
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dac_ddata_cr[i*BITS_PER_SAMPLE +: BITS_PER_SAMPLE] = dac_ddata[((i+1)*DMA_BITS_PER_SAMPLE)-1 -: BITS_PER_SAMPLE];
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end
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end
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end
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@ -34,6 +34,7 @@ module ad_ip_jesd204_tpl_dac_regmap #(
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parameter DEV_PACKAGE = 0,
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parameter NUM_CHANNELS = 2,
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parameter DATA_PATH_WIDTH = 16,
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parameter PADDING_TO_MSB_LSB_N = 0,
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parameter NUM_PROFILES = 1 // Number of supported JESD profiles
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) (
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input s_axi_aclk,
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@ -188,7 +189,8 @@ module ad_ip_jesd204_tpl_dac_regmap #(
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// dac common processor interface
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//
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localparam CONFIG = (XBAR_ENABLE << 10) |
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localparam CONFIG = (PADDING_TO_MSB_LSB_N << 11) |
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(XBAR_ENABLE << 10) |
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(DATAPATH_DISABLE << 6) |
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(IQCORRECTION_DISABLE << 0);
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