diff --git a/.gitignore b/.gitignore
index 032d1b5db..4f6adad05 100644
--- a/.gitignore
+++ b/.gitignore
@@ -108,3 +108,4 @@ _build
.github/CODEOWNERS
.github/PULL_REQUEST_TEMPLATE.md
library/**/.lock
+library/**/interfaces/*.sv
diff --git a/docs/library/spi_engine/spi-bus-interface.rst b/docs/library/spi_engine/spi-bus-interface.rst
index 1aad773c3..ac165125e 100644
--- a/docs/library/spi_engine/spi-bus-interface.rst
+++ b/docs/library/spi_engine/spi-bus-interface.rst
@@ -13,7 +13,7 @@ Files
* - Name
- Description
- * - :git-hdl:`library/spi_engine/interfaces/spi_master_rtl.xml`
+ * - :git-hdl:`library/spi_engine/interfaces/spi_engine_rtl.xml`
- Interface definition file
Signal Pins
diff --git a/library/axi_ad5766/Makefile b/library/axi_ad5766/Makefile
index e8003a624..c38a5167f 100644
--- a/library/axi_ad5766/Makefile
+++ b/library/axi_ad5766/Makefile
@@ -1,5 +1,5 @@
####################################################################################
-## Copyright (c) 2018 - 2023 Analog Devices, Inc.
+## Copyright (c) 2018 - 2024 Analog Devices, Inc.
### SPDX short identifier: BSD-1-Clause
## Auto-generated, do not modify!
####################################################################################
@@ -25,4 +25,6 @@ XILINX_DEPS += ../spi_engine/interfaces/spi_engine_offload_ctrl_rtl.xml
XILINX_LIB_DEPS += util_cdc
+XILINX_INTERFACE_DEPS += spi_engine/interfaces
+
include ../scripts/library.mk
diff --git a/library/interfaces/Makefile b/library/interfaces/Makefile
index 7952cae96..b96091d7f 100644
--- a/library/interfaces/Makefile
+++ b/library/interfaces/Makefile
@@ -16,6 +16,7 @@ M_VIVADO := vivado -mode batch -source
M_FLIST := *.log
M_FLIST += *.jou
+M_FLIST += *.sv
M_FLIST += if_xcvr_cm.xml
M_FLIST += if_xcvr_cm_rtl.xml
M_FLIST += if_xcvr_ch.xml
diff --git a/library/jesd204/interfaces/Makefile b/library/jesd204/interfaces/Makefile
index 30c763ec2..a7492b319 100644
--- a/library/jesd204/interfaces/Makefile
+++ b/library/jesd204/interfaces/Makefile
@@ -33,6 +33,7 @@ XML_FLIST += jesd204_rx_event_rtl.xml
M_FLIST := *.log
M_FLIST += *.jou
+M_FLIST += *.sv
M_FLIST += $(XML_FLIST)
.PHONY: all xilinx clean clean-all
diff --git a/library/spi_engine/axi_spi_engine/Makefile b/library/spi_engine/axi_spi_engine/Makefile
index 33588929c..993f41e38 100644
--- a/library/spi_engine/axi_spi_engine/Makefile
+++ b/library/spi_engine/axi_spi_engine/Makefile
@@ -1,5 +1,5 @@
####################################################################################
-## Copyright (c) 2018 - 2023 Analog Devices, Inc.
+## Copyright (c) 2018 - 2024 Analog Devices, Inc.
### SPDX short identifier: BSD-1-Clause
## Auto-generated, do not modify!
####################################################################################
@@ -22,6 +22,8 @@ XILINX_DEPS += ../../spi_engine/interfaces/spi_engine_offload_ctrl_rtl.xml
XILINX_LIB_DEPS += util_axis_fifo
XILINX_LIB_DEPS += util_cdc
+XILINX_INTERFACE_DEPS += spi_engine/interfaces
+
INTEL_DEPS += ../../common/ad_mem.v
INTEL_DEPS += ../../intel/common/up_rst_constr.sdc
INTEL_DEPS += ../../util_axis_fifo/util_axis_fifo.v
diff --git a/library/spi_engine/axi_spi_engine/axi_spi_engine_ip.tcl b/library/spi_engine/axi_spi_engine/axi_spi_engine_ip.tcl
index 496a99fcf..b775c377c 100644
--- a/library/spi_engine/axi_spi_engine/axi_spi_engine_ip.tcl
+++ b/library/spi_engine/axi_spi_engine/axi_spi_engine_ip.tcl
@@ -1,5 +1,5 @@
###############################################################################
-## Copyright (C) 2015-2023 Analog Devices, Inc. All rights reserved.
+## Copyright (C) 2015-2024 Analog Devices, Inc. All rights reserved.
### SPDX short identifier: ADIBSD
###############################################################################
@@ -34,18 +34,18 @@ adi_add_bus "spi_engine_ctrl" "master" \
"analog.com:interface:spi_engine_ctrl_rtl:1.0" \
"analog.com:interface:spi_engine_ctrl:1.0" \
{
- {"cmd_ready" "CMD_READY"} \
- {"cmd_valid" "CMD_VALID"} \
- {"cmd_data" "CMD_DATA"} \
- {"sdo_data_ready" "SDO_READY"} \
- {"sdo_data_valid" "SDO_VALID"} \
- {"sdo_data" "SDO_DATA"} \
- {"sdi_data_ready" "SDI_READY"} \
- {"sdi_data_valid" "SDI_VALID"} \
- {"sdi_data" "SDI_DATA"} \
- {"sync_ready" "SYNC_READY"} \
- {"sync_valid" "SYNC_VALID"} \
- {"sync_data" "SYNC_DATA"} \
+ {"cmd_ready" "cmd_ready"} \
+ {"cmd_valid" "cmd_valid"} \
+ {"cmd_data" "cmd_data"} \
+ {"sdo_data_ready" "sdo_ready"} \
+ {"sdo_data_valid" "sdo_valid"} \
+ {"sdo_data" "sdo_data"} \
+ {"sdi_data_ready" "sdi_ready"} \
+ {"sdi_data_valid" "sdi_valid"} \
+ {"sdi_data" "sdi_data"} \
+ {"sync_ready" "sync_ready"} \
+ {"sync_valid" "sync_valid"} \
+ {"sync_data" "sync_data"} \
}
adi_add_bus_clock "spi_clk" "spi_engine_ctrl" "spi_resetn" "master"
@@ -53,18 +53,17 @@ adi_add_bus "spi_engine_offload_ctrl0" "master" \
"analog.com:interface:spi_engine_offload_ctrl_rtl:1.0" \
"analog.com:interface:spi_engine_offload_ctrl:1.0" \
{ \
- { "offload0_cmd_wr_en" "CMD_WR_EN"} \
- { "offload0_cmd_wr_data" "CMD_WR_DATA"} \
- { "offload0_sdo_wr_en" "SDO_WR_EN"} \
- { "offload0_sdo_wr_data" "SDO_WR_DATA"} \
- { "offload0_enable" "ENABLE"} \
- { "offload0_enabled" "ENABLED"} \
- { "offload0_mem_reset" "MEM_RESET"} \
- { "offload_sync_ready" "SYNC_READY"} \
- { "offload_sync_valid" "SYNC_VALID"} \
- { "offload_sync_data" "SYNC_DATA"} \
+ { "offload0_cmd_wr_en" "cmd_wr_en"} \
+ { "offload0_cmd_wr_data" "cmd_wr_data"} \
+ { "offload0_sdo_wr_en" "sdo_wr_en"} \
+ { "offload0_sdo_wr_data" "sdo_wr_data"} \
+ { "offload0_enable" "enable"} \
+ { "offload0_enabled" "enabled"} \
+ { "offload0_mem_reset" "mem_reset"} \
+ { "offload_sync_ready" "sync_ready"} \
+ { "offload_sync_valid" "sync_valid"} \
+ { "offload_sync_data" "sync_data"} \
}
-
adi_add_bus_clock "s_axi_aclk" "spi_engine_offload_ctrl0:s_axi" "s_axi_aresetn"
foreach port {"up_clk" "up_rstn" "up_wreq" "up_waddr" "up_wdata" "up_rreq" "up_raddr"} {
diff --git a/library/spi_engine/interfaces/Makefile b/library/spi_engine/interfaces/Makefile
new file mode 100644
index 000000000..b9b4d67f5
--- /dev/null
+++ b/library/spi_engine/interfaces/Makefile
@@ -0,0 +1,41 @@
+####################################################################################
+####################################################################################
+## Copyright (c) 2018 - 2024 Analog Devices, Inc.
+### SPDX short identifier: BSD-1-Clause
+## Auto-generated, do not modify!
+####################################################################################
+####################################################################################
+
+M_DEPS := interfaces_ip.tcl
+M_DEPS += ../../../scripts/adi_env.tcl
+M_DEPS += ../../scripts/adi_ip_xilinx.tcl
+
+M_VIVADO := vivado -mode batch -source
+
+XML_FLIST := spi_engine.xml
+XML_FLIST += spi_engine_rtl.xml
+XML_FLIST += spi_engine_ctrl.xml
+XML_FLIST += spi_engine_ctrl_rtl.xml
+XML_FLIST += spi_engine_offload_ctrl.xml
+XML_FLIST += spi_engine_offload_ctrl_rtl.xml
+
+M_FLIST := *.log
+M_FLIST += *.jou
+M_FLIST += *.sv
+M_FLIST += $(XML_FLIST)
+
+.PHONY: all xilinx clean clean-all
+all: xilinx
+
+xilinx: $(XML_FLIST)
+
+clean:clean-all
+
+clean-all:
+ rm -rf $(M_FLIST)
+
+%.xml: $(M_DEPS)
+ $(M_VIVADO) interfaces_ip.tcl >> interfaces_ip.log 2>&1
+
+####################################################################################
+####################################################################################
diff --git a/library/spi_engine/interfaces/interfaces_ip.tcl b/library/spi_engine/interfaces/interfaces_ip.tcl
new file mode 100644
index 000000000..57c919110
--- /dev/null
+++ b/library/spi_engine/interfaces/interfaces_ip.tcl
@@ -0,0 +1,47 @@
+###############################################################################
+## Copyright (C) 2024 Analog Devices, Inc. All rights reserved.
+### SPDX short identifier: ADIBSD
+###############################################################################
+
+source ../../../scripts/adi_env.tcl
+source $ad_hdl_dir/library/scripts/adi_ip_xilinx.tcl
+
+# SPI interface
+
+adi_if_define "spi_engine"
+adi_if_ports output 1 sclk
+adi_if_ports output 1 sdo
+adi_if_ports output 1 sdo_t
+adi_if_ports input -1 sdi
+adi_if_ports output -1 cs
+adi_if_ports output 1 three_wire
+
+# Control interface
+
+adi_if_define "spi_engine_ctrl"
+adi_if_ports input 1 cmd_ready
+adi_if_ports output 1 cmd_valid
+adi_if_ports output 16 cmd_data
+adi_if_ports input 1 sdo_data_ready
+adi_if_ports output 1 sdo_data_valid
+adi_if_ports output -1 sdo_data
+adi_if_ports output 1 sdi_data_ready
+adi_if_ports input 1 sdi_data_valid
+adi_if_ports input -1 sdi_data
+adi_if_ports output 1 sync_ready
+adi_if_ports input 1 sync_valid
+adi_if_ports input 8 sync_data
+
+# Offload control interface
+
+adi_if_define "spi_engine_offload_ctrl"
+adi_if_ports output 1 cmd_wr_en
+adi_if_ports output 16 cmd_wr_data
+adi_if_ports output 1 sdo_wr_en
+adi_if_ports output -1 sdo_wr_data
+adi_if_ports output 1 mem_reset
+adi_if_ports output 1 enable
+adi_if_ports input 1 enabled
+adi_if_ports output 1 sync_ready
+adi_if_ports input 1 sync_valid
+adi_if_ports input 8 sync_data
diff --git a/library/spi_engine/interfaces/spi_engine_ctrl.xml b/library/spi_engine/interfaces/spi_engine_ctrl.xml
deleted file mode 100644
index 0ccbf8def..000000000
--- a/library/spi_engine/interfaces/spi_engine_ctrl.xml
+++ /dev/null
@@ -1,13 +0,0 @@
-
-
- analog.com
- interface
- spi_engine_ctrl
- 1.0
- false
- false
- 1
- 1
-
diff --git a/library/spi_engine/interfaces/spi_engine_ctrl_rtl.xml b/library/spi_engine/interfaces/spi_engine_ctrl_rtl.xml
deleted file mode 100644
index 2ba4f27f6..000000000
--- a/library/spi_engine/interfaces/spi_engine_ctrl_rtl.xml
+++ /dev/null
@@ -1,189 +0,0 @@
-
-
- analog.com
- interface
- spi_engine_ctrl_rtl
- 1.0
-
-
-
- CMD_READY
-
-
- required
- 1
- in
-
-
- required
- 1
-
-
-
-
- CMD_VALID
-
-
- required
- 1
-
-
- required
- 1
- in
-
-
-
-
- CMD_DATA
-
-
- required
- 16
-
-
- required
- 16
- in
-
-
-
-
- SDO_READY
-
-
- required
- 1
- in
-
-
- required
- 1
-
-
-
-
- SDO_VALID
-
-
- required
- 1
-
-
- required
- 1
- in
-
-
-
-
- SDO_DATA
-
-
- required
- 8
-
-
- required
- 8
- in
-
-
-
-
- SDI_READY
-
-
- required
- 1
- out
-
-
- required
- 1
- in
-
-
-
-
- SDI_VALID
-
-
- required
- 1
- in
-
-
- required
- 1
- out
-
-
-
-
- SDI_DATA
-
-
- required
- 8
- in
-
-
- required
- 8
- out
-
-
-
-
- SYNC_READY
-
-
- required
- 1
- out
-
-
- required
- 1
- in
-
-
-
-
- SYNC_VALID
-
-
- required
- 1
- in
-
-
- required
- 1
- out
-
-
-
-
- SYNC_DATA
-
-
- required
- 8
- in
-
-
- required
- 8
- out
-
-
-
-
-
diff --git a/library/spi_engine/interfaces/spi_engine_offload_ctrl.xml b/library/spi_engine/interfaces/spi_engine_offload_ctrl.xml
deleted file mode 100644
index 5a8a05eaf..000000000
--- a/library/spi_engine/interfaces/spi_engine_offload_ctrl.xml
+++ /dev/null
@@ -1,13 +0,0 @@
-
-
- analog.com
- interface
- spi_engine_offload_ctrl
- 1.0
- false
- false
- 1
- 1
-
diff --git a/library/spi_engine/interfaces/spi_engine_offload_ctrl_rtl.xml b/library/spi_engine/interfaces/spi_engine_offload_ctrl_rtl.xml
deleted file mode 100644
index 820134325..000000000
--- a/library/spi_engine/interfaces/spi_engine_offload_ctrl_rtl.xml
+++ /dev/null
@@ -1,158 +0,0 @@
-
-
- analog.com
- interface
- spi_engine_offload_ctrl_rtl
- 1.0
-
-
-
- CMD_WR_EN
-
-
- required
- 1
-
-
- required
- 1
- in
-
-
-
-
- CMD_WR_DATA
-
-
- required
- 16
-
-
- required
- 16
- in
-
-
-
-
- SDO_WR_EN
-
-
- optional
- 1
-
-
- optional
- 1
- in
-
-
-
-
- SDO_WR_DATA
-
-
- optional
- 8
-
-
- optional
- 8
- in
-
-
-
-
- ENABLE
-
-
- required
- 1
-
-
- required
- 1
- in
-
-
-
-
- MEM_RESET
-
-
- required
- 1
-
-
- required
- 1
- in
-
-
-
-
- ENABLED
-
-
- required
- 1
- in
-
-
- required
- 1
-
-
-
-
- SYNC_READY
-
-
- required
- 1
- out
-
-
- required
- 1
- in
-
-
-
-
- SYNC_VALID
-
-
- required
- 1
- in
-
-
- required
- 1
- out
-
-
-
-
- SYNC_DATA
-
-
- required
- 8
- in
-
-
- required
- 8
- out
-
-
-
-
-
diff --git a/library/spi_engine/interfaces/spi_master.xml b/library/spi_engine/interfaces/spi_master.xml
deleted file mode 100644
index b03644e64..000000000
--- a/library/spi_engine/interfaces/spi_master.xml
+++ /dev/null
@@ -1,14 +0,0 @@
-
-
- analog.com
- interface
- spi_master
- 1.0
- false
- false
- 1
- 1
- SPI Engine physical interface
-
diff --git a/library/spi_engine/interfaces/spi_master_rtl.xml b/library/spi_engine/interfaces/spi_master_rtl.xml
deleted file mode 100644
index 3c4063054..000000000
--- a/library/spi_engine/interfaces/spi_master_rtl.xml
+++ /dev/null
@@ -1,112 +0,0 @@
-
-
- analog.com
- interface
- spi_master_rtl
- 1.0
-
-
-
- SCLK
- SPI clock
-
-
- required
- 1
- out
-
-
- required
- 1
- in
-
-
-
-
- SDI
- Serial data in
-
-
- optional
- in
-
-
- optional
- out
-
- 0
-
-
-
- SDO
- Serial data out
-
-
- optional
- 1
- out
-
-
- optional
- 1
- in
-
- 0
-
-
-
- SDO_T
- Serial data out three state controle line
-
-
- optional
- 1
- out
-
-
- optional
- 1
- in
-
- 0
-
-
-
- THREE_WIRE
- Three wire mode
-
-
- optional
- 1
- out
-
-
- optional
- 1
- in
-
- 0
-
-
-
- CS
- Chip select
-
-
- required
- out
-
-
- required
- in
-
- 0
-
-
-
-
diff --git a/library/spi_engine/scripts/spi_engine.tcl b/library/spi_engine/scripts/spi_engine.tcl
index f59a7db1a..589ebf8e4 100644
--- a/library/spi_engine/scripts/spi_engine.tcl
+++ b/library/spi_engine/scripts/spi_engine.tcl
@@ -1,5 +1,5 @@
###############################################################################
-## Copyright (C) 2020-2023 Analog Devices, Inc. All rights reserved.
+## Copyright (C) 2020-2024 Analog Devices, Inc. All rights reserved.
### SPDX short identifier: ADIBSD
###############################################################################
@@ -19,7 +19,7 @@ proc spi_engine_create {{name "spi_engine"} {data_width 32} {async_spi_clk 1} {n
create_bd_pin -dir I -type rst resetn
create_bd_pin -dir I trigger
create_bd_pin -dir O irq
- create_bd_intf_pin -mode Master -vlnv analog.com:interface:spi_master_rtl:1.0 m_spi
+ create_bd_intf_pin -mode Master -vlnv analog.com:interface:spi_engine_rtl:1.0 m_spi
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 m_axis_sample
set execution "${name}_execution"
diff --git a/library/spi_engine/spi_axis_reorder/Makefile b/library/spi_engine/spi_axis_reorder/Makefile
index af8fe5be7..2c87b01aa 100644
--- a/library/spi_engine/spi_axis_reorder/Makefile
+++ b/library/spi_engine/spi_axis_reorder/Makefile
@@ -1,5 +1,5 @@
####################################################################################
-## Copyright (c) 2018 - 2023 Analog Devices, Inc.
+## Copyright (c) 2018 - 2024 Analog Devices, Inc.
### SPDX short identifier: BSD-1-Clause
## Auto-generated, do not modify!
####################################################################################
diff --git a/library/spi_engine/spi_engine_execution/Makefile b/library/spi_engine/spi_engine_execution/Makefile
index 0bd32b446..30f20717b 100644
--- a/library/spi_engine/spi_engine_execution/Makefile
+++ b/library/spi_engine/spi_engine_execution/Makefile
@@ -1,5 +1,5 @@
####################################################################################
-## Copyright (c) 2018 - 2023 Analog Devices, Inc.
+## Copyright (c) 2018 - 2024 Analog Devices, Inc.
### SPDX short identifier: BSD-1-Clause
## Auto-generated, do not modify!
####################################################################################
@@ -11,10 +11,12 @@ GENERIC_DEPS += spi_engine_execution.v
XILINX_DEPS += spi_engine_execution_constr.ttcl
XILINX_DEPS += spi_engine_execution_ip.tcl
+XILINX_DEPS += ../../spi_engine/interfaces/spi_engine.xml
XILINX_DEPS += ../../spi_engine/interfaces/spi_engine_ctrl.xml
XILINX_DEPS += ../../spi_engine/interfaces/spi_engine_ctrl_rtl.xml
-XILINX_DEPS += ../../spi_engine/interfaces/spi_master.xml
-XILINX_DEPS += ../../spi_engine/interfaces/spi_master_rtl.xml
+XILINX_DEPS += ../../spi_engine/interfaces/spi_engine_rtl.xml
+
+XILINX_INTERFACE_DEPS += spi_engine/interfaces
INTEL_DEPS += spi_engine_execution_hw.tcl
diff --git a/library/spi_engine/spi_engine_execution/spi_engine_execution_ip.tcl b/library/spi_engine/spi_engine_execution/spi_engine_execution_ip.tcl
index 84c16d7c2..7c5b48712 100644
--- a/library/spi_engine/spi_engine_execution/spi_engine_execution_ip.tcl
+++ b/library/spi_engine/spi_engine_execution/spi_engine_execution_ip.tcl
@@ -1,5 +1,5 @@
###############################################################################
-## Copyright (C) 2015-2023 Analog Devices, Inc. All rights reserved.
+## Copyright (C) 2015-2024 Analog Devices, Inc. All rights reserved.
### SPDX short identifier: ADIBSD
###############################################################################
@@ -26,31 +26,31 @@ adi_add_bus "ctrl" "slave" \
"analog.com:interface:spi_engine_ctrl_rtl:1.0" \
"analog.com:interface:spi_engine_ctrl:1.0" \
{
- {"cmd_ready" "CMD_READY"} \
- {"cmd_valid" "CMD_VALID"} \
- {"cmd" "CMD_DATA"} \
- {"sdo_data_ready" "SDO_READY"} \
- {"sdo_data_valid" "SDO_VALID"} \
- {"sdo_data" "SDO_DATA"} \
- {"sdi_data_ready" "SDI_READY"} \
- {"sdi_data_valid" "SDI_VALID"} \
- {"sdi_data" "SDI_DATA"} \
- {"sync_ready" "SYNC_READY"} \
- {"sync_valid" "SYNC_VALID"} \
- {"sync" "SYNC_DATA"} \
+ {"cmd_ready" "cmd_ready"} \
+ {"cmd_valid" "cmd_valid"} \
+ {"cmd" "cmd_data"} \
+ {"sdo_data_ready" "sdo_ready"} \
+ {"sdo_data_valid" "sdo_valid"} \
+ {"sdo_data" "sdo_data"} \
+ {"sdi_data_ready" "sdi_ready"} \
+ {"sdi_data_valid" "sdi_valid"} \
+ {"sdi_data" "sdi_data"} \
+ {"sync_ready" "sync_ready"} \
+ {"sync_valid" "sync_valid"} \
+ {"sync" "sync_data"} \
}
adi_add_bus_clock "clk" "ctrl" "resetn"
adi_add_bus "spi" "master" \
- "analog.com:interface:spi_master_rtl:1.0" \
- "analog.com:interface:spi_master:1.0" \
+ "analog.com:interface:spi_engine_rtl:1.0" \
+ "analog.com:interface:spi_engine:1.0" \
{
- {"sclk" "SCLK"} \
- {"sdi" "SDI"} \
- {"sdo" "SDO"} \
- {"sdo_t" "SDO_T"} \
- {"three_wire" "THREE_WIRE"} \
- {"cs" "CS"} \
+ {"sclk" "sclk"} \
+ {"sdi" "sdi"} \
+ {"sdo" "sdo"} \
+ {"sdo_t" "sdo_t"} \
+ {"three_wire" "three_wire"} \
+ {"cs" "cs"} \
}
adi_add_bus_clock "clk" "spi" "resetn"
diff --git a/library/spi_engine/spi_engine_interconnect/Makefile b/library/spi_engine/spi_engine_interconnect/Makefile
index 6624efa0d..4b660e6df 100644
--- a/library/spi_engine/spi_engine_interconnect/Makefile
+++ b/library/spi_engine/spi_engine_interconnect/Makefile
@@ -1,5 +1,5 @@
####################################################################################
-## Copyright (c) 2018 - 2023 Analog Devices, Inc.
+## Copyright (c) 2018 - 2024 Analog Devices, Inc.
### SPDX short identifier: BSD-1-Clause
## Auto-generated, do not modify!
####################################################################################
@@ -13,6 +13,8 @@ XILINX_DEPS += spi_engine_interconnect_ip.tcl
XILINX_DEPS += ../../spi_engine/interfaces/spi_engine_ctrl.xml
XILINX_DEPS += ../../spi_engine/interfaces/spi_engine_ctrl_rtl.xml
+XILINX_INTERFACE_DEPS += spi_engine/interfaces
+
INTEL_DEPS += spi_engine_interconnect_hw.tcl
include ../../scripts/library.mk
diff --git a/library/spi_engine/spi_engine_interconnect/spi_engine_interconnect_ip.tcl b/library/spi_engine/spi_engine_interconnect/spi_engine_interconnect_ip.tcl
index 49e19b6e3..650a72c0e 100644
--- a/library/spi_engine/spi_engine_interconnect/spi_engine_interconnect_ip.tcl
+++ b/library/spi_engine/spi_engine_interconnect/spi_engine_interconnect_ip.tcl
@@ -24,18 +24,18 @@ adi_add_bus "m_ctrl" "master" \
"analog.com:interface:spi_engine_ctrl_rtl:1.0" \
"analog.com:interface:spi_engine_ctrl:1.0" \
{ \
- {"m_cmd_ready" "CMD_READY"} \
- {"m_cmd_valid" "CMD_VALID"} \
- {"m_cmd_data" "CMD_DATA"} \
- {"m_sdo_ready" "SDO_READY"} \
- {"m_sdo_valid" "SDO_VALID"} \
- {"m_sdo_data" "SDO_DATA"} \
- {"m_sdi_ready" "SDI_READY"} \
- {"m_sdi_valid" "SDI_VALID"} \
- {"m_sdi_data" "SDI_DATA"} \
- {"m_sync_ready" "SYNC_READY"} \
- {"m_sync_valid" "SYNC_VALID"} \
- {"m_sync" "SYNC_DATA"} \
+ {"m_cmd_ready" "cmd_ready"} \
+ {"m_cmd_valid" "cmd_valid"} \
+ {"m_cmd_data" "cmd_data"} \
+ {"m_sdo_ready" "sdo_ready"} \
+ {"m_sdo_valid" "sdo_valid"} \
+ {"m_sdo_data" "sdo_data"} \
+ {"m_sdi_ready" "sdi_ready"} \
+ {"m_sdi_valid" "sdi_valid"} \
+ {"m_sdi_data" "sdi_data"} \
+ {"m_sync_ready" "sync_ready"} \
+ {"m_sync_valid" "sync_valid"} \
+ {"m_sync" "sync_data"} \
}
adi_add_bus_clock "clk" "m_ctrl" "resetn"
@@ -44,18 +44,18 @@ foreach prefix [list "s0" "s1"] {
"analog.com:interface:spi_engine_ctrl_rtl:1.0" \
"analog.com:interface:spi_engine_ctrl:1.0" \
[list \
- [list [format "%s_cmd_ready" $prefix] "CMD_READY"] \
- [list [format "%s_cmd_valid" $prefix] "CMD_VALID"] \
- [list [format "%s_cmd_data" $prefix] "CMD_DATA"] \
- [list [format "%s_sdo_ready" $prefix] "SDO_READY"] \
- [list [format "%s_sdo_valid" $prefix] "SDO_VALID"] \
- [list [format "%s_sdo_data" $prefix] "SDO_DATA"] \
- [list [format "%s_sdi_ready" $prefix] "SDI_READY"] \
- [list [format "%s_sdi_valid" $prefix] "SDI_VALID"] \
- [list [format "%s_sdi_data" $prefix] "SDI_DATA"] \
- [list [format "%s_sync_ready" $prefix] "SYNC_READY"] \
- [list [format "%s_sync_valid" $prefix] "SYNC_VALID"] \
- [list [format "%s_sync" $prefix] "SYNC_DATA"] \
+ [list [format "%s_cmd_ready" $prefix] "cmd_ready"] \
+ [list [format "%s_cmd_valid" $prefix] "cmd_valid"] \
+ [list [format "%s_cmd_data" $prefix] "cmd_data"] \
+ [list [format "%s_sdo_ready" $prefix] "sdo_ready"] \
+ [list [format "%s_sdo_valid" $prefix] "sdo_valid"] \
+ [list [format "%s_sdo_data" $prefix] "sdo_data"] \
+ [list [format "%s_sdi_ready" $prefix] "sdi_ready"] \
+ [list [format "%s_sdi_valid" $prefix] "sdi_valid"] \
+ [list [format "%s_sdi_data" $prefix] "sdi_data"] \
+ [list [format "%s_sync_ready" $prefix] "sync_ready"] \
+ [list [format "%s_sync_valid" $prefix] "sync_valid"] \
+ [list [format "%s_sync" $prefix] "sync_data"] \
]
adi_add_bus_clock "clk" [format "%s_ctrl" $prefix] "resetn"
}
diff --git a/library/spi_engine/spi_engine_offload/Makefile b/library/spi_engine/spi_engine_offload/Makefile
index 0a7e97da9..7fa094119 100644
--- a/library/spi_engine/spi_engine_offload/Makefile
+++ b/library/spi_engine/spi_engine_offload/Makefile
@@ -1,5 +1,5 @@
####################################################################################
-## Copyright (c) 2018 - 2023 Analog Devices, Inc.
+## Copyright (c) 2018 - 2024 Analog Devices, Inc.
### SPDX short identifier: BSD-1-Clause
## Auto-generated, do not modify!
####################################################################################
@@ -18,6 +18,8 @@ XILINX_DEPS += ../../spi_engine/interfaces/spi_engine_offload_ctrl_rtl.xml
XILINX_LIB_DEPS += util_cdc
+XILINX_INTERFACE_DEPS += spi_engine/interfaces
+
INTEL_DEPS += ../../util_cdc/sync_bits.v
INTEL_DEPS += spi_engine_offload_hw.tcl
diff --git a/library/spi_engine/spi_engine_offload/spi_engine_offload_ip.tcl b/library/spi_engine/spi_engine_offload/spi_engine_offload_ip.tcl
index 4f2308906..f524d001e 100644
--- a/library/spi_engine/spi_engine_offload/spi_engine_offload_ip.tcl
+++ b/library/spi_engine/spi_engine_offload/spi_engine_offload_ip.tcl
@@ -32,43 +32,43 @@ adi_add_bus "spi_engine_ctrl" "master" \
"analog.com:interface:spi_engine_ctrl_rtl:1.0" \
"analog.com:interface:spi_engine_ctrl:1.0" \
{
- {"cmd_ready" "CMD_READY"} \
- {"cmd_valid" "CMD_VALID"} \
- {"cmd" "CMD_DATA"} \
- {"sdo_data_ready" "SDO_READY"} \
- {"sdo_data_valid" "SDO_VALID"} \
- {"sdo_data" "SDO_DATA"} \
- {"sdi_data_ready" "SDI_READY"} \
- {"sdi_data_valid" "SDI_VALID"} \
- {"sdi_data" "SDI_DATA"} \
- {"sync_ready" "SYNC_READY"} \
- {"sync_valid" "SYNC_VALID"} \
- {"sync_data" "SYNC_DATA"} \
+ {"cmd_ready" "cmd_ready"} \
+ {"cmd_valid" "cmd_valid"} \
+ {"cmd" "cmd_data"} \
+ {"sdo_data_ready" "sdo_ready"} \
+ {"sdo_data_valid" "sdo_valid"} \
+ {"sdo_data" "sdo_data"} \
+ {"sdi_data_ready" "sdi_ready"} \
+ {"sdi_data_valid" "sdi_valid"} \
+ {"sdi_data" "sdi_data"} \
+ {"sync_ready" "sync_ready"} \
+ {"sync_valid" "sync_valid"} \
+ {"sync_data" "sync_data"} \
}
adi_add_bus "spi_engine_offload_ctrl" "slave" \
"analog.com:interface:spi_engine_offload_ctrl_rtl:1.0" \
"analog.com:interface:spi_engine_offload_ctrl:1.0" \
{ \
- { "ctrl_cmd_wr_en" "CMD_WR_EN"} \
- { "ctrl_cmd_wr_data" "CMD_WR_DATA"} \
- { "ctrl_sdo_wr_en" "SDO_WR_EN"} \
- { "ctrl_sdo_wr_data" "SDO_WR_DATA"} \
- { "ctrl_enable" "ENABLE"} \
- { "ctrl_enabled" "ENABLED"} \
- { "ctrl_mem_reset" "MEM_RESET"} \
- { "status_sync_ready" "SYNC_READY"} \
- { "status_sync_valid" "SYNC_VALID"} \
- { "status_sync_data" "SYNC_DATA"} \
+ { "ctrl_cmd_wr_en" "cmd_wr_en"} \
+ { "ctrl_cmd_wr_data" "cmd_wr_data"} \
+ { "ctrl_sdo_wr_en" "sdo_wr_en"} \
+ { "ctrl_sdo_wr_data" "sdo_wr_data"} \
+ { "ctrl_enable" "enable"} \
+ { "ctrl_enabled" "enabled"} \
+ { "ctrl_mem_reset" "mem_reset"} \
+ { "status_sync_ready" "sync_ready"} \
+ { "status_sync_valid" "sync_valid"} \
+ { "status_sync_data" "sync_data"} \
}
adi_add_bus "offload_sdi" "master" \
"xilinx.com:interface:axis_rtl:1.0" \
"xilinx.com:interface:axis:1.0" \
{ \
- {"offload_sdi_valid" "TVALID"} \
- {"offload_sdi_ready" "TREADY"} \
- {"offload_sdi_data" "TDATA"} \
+ {"offload_sdi_valid" "tvalid"} \
+ {"offload_sdi_ready" "tready"} \
+ {"offload_sdi_data" "tdata"} \
}
adi_add_bus_clock "spi_clk" "spi_engine_ctrl:offload_sdi" "spi_resetn"
diff --git a/library/util_sigma_delta_spi/Makefile b/library/util_sigma_delta_spi/Makefile
index 594d724ef..80b90f642 100644
--- a/library/util_sigma_delta_spi/Makefile
+++ b/library/util_sigma_delta_spi/Makefile
@@ -1,5 +1,5 @@
####################################################################################
-## Copyright (c) 2018 - 2023 Analog Devices, Inc.
+## Copyright (c) 2018 - 2024 Analog Devices, Inc.
### SPDX short identifier: BSD-1-Clause
## Auto-generated, do not modify!
####################################################################################
@@ -10,7 +10,7 @@ GENERIC_DEPS += util_sigma_delta_spi.v
XILINX_DEPS += util_sigma_delta_spi_ip.tcl
-XILINX_DEPS += ../spi_engine/interfaces/spi_master.xml
-XILINX_DEPS += ../spi_engine/interfaces/spi_master_rtl.xml
+XILINX_DEPS += ../spi_engine/interfaces/spi_engine.xml
+XILINX_DEPS += ../spi_engine/interfaces/spi_engine_rtl.xml
include ../scripts/library.mk
diff --git a/library/util_sigma_delta_spi/util_sigma_delta_spi_ip.tcl b/library/util_sigma_delta_spi/util_sigma_delta_spi_ip.tcl
index a90d88459..07a13422a 100644
--- a/library/util_sigma_delta_spi/util_sigma_delta_spi_ip.tcl
+++ b/library/util_sigma_delta_spi/util_sigma_delta_spi_ip.tcl
@@ -1,5 +1,5 @@
###############################################################################
-## Copyright (C) 2015-2023 Analog Devices, Inc. All rights reserved.
+## Copyright (C) 2015-2024 Analog Devices, Inc. All rights reserved.
### SPDX short identifier: ADIBSD
###############################################################################
@@ -14,8 +14,8 @@ adi_ip_files util_sigma_delta_spi [list \
adi_ip_properties_lite util_sigma_delta_spi
adi_add_bus "m_spi" "master" \
- "analog.com:interface:spi_master_rtl:1.0" \
- "analog.com:interface:spi_master:1.0" \
+ "analog.com:interface:spi_engine_rtl:1.0" \
+ "analog.com:interface:spi_engine:1.0" \
{
{"m_sclk" "SCLK"} \
{"m_sdi" "SDI"} \
@@ -25,8 +25,8 @@ adi_add_bus "m_spi" "master" \
}
adi_add_bus "s_spi" "slave" \
- "analog.com:interface:spi_master_rtl:1.0" \
- "analog.com:interface:spi_master:1.0" \
+ "analog.com:interface:spi_engine_rtl:1.0" \
+ "analog.com:interface:spi_engine:1.0" \
{
{"s_sclk" "SCLK"} \
{"s_sdi" "SDI"} \
diff --git a/projects/ad40xx_fmc/common/ad40xx_bd.tcl b/projects/ad40xx_fmc/common/ad40xx_bd.tcl
index e1813d6eb..1fa1ad7e6 100644
--- a/projects/ad40xx_fmc/common/ad40xx_bd.tcl
+++ b/projects/ad40xx_fmc/common/ad40xx_bd.tcl
@@ -1,9 +1,9 @@
###############################################################################
-## Copyright (C) 2019-2023 Analog Devices, Inc. All rights reserved.
+## Copyright (C) 2019-2024 Analog Devices, Inc. All rights reserved.
### SPDX short identifier: ADIBSD
###############################################################################
-create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_master_rtl:1.0 ad40xx_spi
+create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_engine_rtl:1.0 ad40xx_spi
## To support the 1.8MSPS (SCLK == 100 MHz), set the spi clock to 200 MHz
@@ -20,7 +20,7 @@ current_bd_instance /spi_ad40xx
create_bd_pin -dir I -type rst resetn
create_bd_pin -dir I -type clk spi_clk
create_bd_pin -dir O irq
- create_bd_intf_pin -mode Master -vlnv analog.com:interface:spi_master_rtl:1.0 m_spi
+ create_bd_intf_pin -mode Master -vlnv analog.com:interface:spi_engine_rtl:1.0 m_spi
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 M_AXIS_SAMPLE
if {$ADC_RESOLUTION <= 16} {
diff --git a/projects/ad4134_fmc/common/ad4134_bd.tcl b/projects/ad4134_fmc/common/ad4134_bd.tcl
index 67f9ff8fd..c28b3a70c 100644
--- a/projects/ad4134_fmc/common/ad4134_bd.tcl
+++ b/projects/ad4134_fmc/common/ad4134_bd.tcl
@@ -1,9 +1,9 @@
###############################################################################
-## Copyright (C) 2023 Analog Devices, Inc. All rights reserved.
+## Copyright (C) 2023-2024 Analog Devices, Inc. All rights reserved.
### SPDX short identifier: ADIBSD
###############################################################################
-create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_master_rtl:1.0 ad4134_di
+create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_engine_rtl:1.0 ad4134_di
create_bd_port -dir O ad4134_odr
# create a SPI Engine architecture for ADC
diff --git a/projects/ad4630_fmc/common/ad463x_bd.tcl b/projects/ad4630_fmc/common/ad463x_bd.tcl
index 03d27147d..39a0dbd04 100644
--- a/projects/ad4630_fmc/common/ad463x_bd.tcl
+++ b/projects/ad4630_fmc/common/ad463x_bd.tcl
@@ -1,5 +1,5 @@
###############################################################################
-## Copyright (C) 2021-2023 Analog Devices, Inc. All rights reserved.
+## Copyright (C) 2021-2024 Analog Devices, Inc. All rights reserved.
### SPDX short identifier: ADIBSD
###############################################################################
@@ -21,7 +21,7 @@ set cnv_ref_clk 100
# NOTE: this is a default value, software may or may not change this
set adc_sampling_rate 1000000
-#create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_master_rtl:1.0 ad463x_spi
+#create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_engine_rtl:1.0 ad463x_spi
create_bd_port -dir O ad463x_spi_sclk
create_bd_port -dir O ad463x_spi_cs
diff --git a/projects/ad469x_fmc/common/ad469x_bd.tcl b/projects/ad469x_fmc/common/ad469x_bd.tcl
index 2881728c8..ff40b3f43 100644
--- a/projects/ad469x_fmc/common/ad469x_bd.tcl
+++ b/projects/ad469x_fmc/common/ad469x_bd.tcl
@@ -1,9 +1,9 @@
###############################################################################
-## Copyright (C) 2020-2023 Analog Devices, Inc. All rights reserved.
+## Copyright (C) 2020-2024 Analog Devices, Inc. All rights reserved.
### SPDX short identifier: ADIBSD
###############################################################################
-create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_master_rtl:1.0 ad469x_spi
+create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_engine_rtl:1.0 ad469x_spi
create_bd_port -dir O ad469x_spi_cnv
create_bd_port -dir I ad469x_spi_busy
diff --git a/projects/ad5766_sdz/common/ad5766_bd.tcl b/projects/ad5766_sdz/common/ad5766_bd.tcl
index 6008b031e..ecdb027d6 100644
--- a/projects/ad5766_sdz/common/ad5766_bd.tcl
+++ b/projects/ad5766_sdz/common/ad5766_bd.tcl
@@ -1,5 +1,5 @@
###############################################################################
-## Copyright (C) 2019-2023 Analog Devices, Inc. All rights reserved.
+## Copyright (C) 2019-2024 Analog Devices, Inc. All rights reserved.
### SPDX short identifier: ADIBSD
###############################################################################
@@ -17,7 +17,7 @@ current_bd_instance /spi
create_bd_pin -dir I -from 15 -to 0 dma_data
create_bd_pin -dir I dma_xfer_req
create_bd_pin -dir I dma_underflow
- create_bd_intf_pin -mode Master -vlnv analog.com:interface:spi_master_rtl:1.0 m_spi
+ create_bd_intf_pin -mode Master -vlnv analog.com:interface:spi_engine_rtl:1.0 m_spi
ad_ip_instance spi_engine_execution execution
ad_ip_instance axi_spi_engine axi
@@ -61,7 +61,7 @@ current_bd_instance /
ad_connect sys_cpu_clk spi/clk
ad_connect sys_cpu_resetn spi/resetn
-create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_master_rtl:1.0 spi
+create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_engine_rtl:1.0 spi
ad_connect spi/m_spi spi
ad_ip_instance axi_dmac axi_ad5766_dac_dma
diff --git a/projects/ad7134_fmc/common/ad7134_bd.tcl b/projects/ad7134_fmc/common/ad7134_bd.tcl
index d136fb01a..d4a7642d0 100644
--- a/projects/ad7134_fmc/common/ad7134_bd.tcl
+++ b/projects/ad7134_fmc/common/ad7134_bd.tcl
@@ -1,9 +1,9 @@
###############################################################################
-## Copyright (C) 2019-2023 Analog Devices, Inc. All rights reserved.
+## Copyright (C) 2019-2024 Analog Devices, Inc. All rights reserved.
### SPDX short identifier: ADIBSD
###############################################################################
-create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_master_rtl:1.0 ad713x_di
+create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_engine_rtl:1.0 ad713x_di
create_bd_port -dir O ad713x_odr
create_bd_port -dir O ad713x_sdpclk
diff --git a/projects/ad738x_fmc/common/ad738x_bd.tcl b/projects/ad738x_fmc/common/ad738x_bd.tcl
index 853da01f9..771077b22 100644
--- a/projects/ad738x_fmc/common/ad738x_bd.tcl
+++ b/projects/ad738x_fmc/common/ad738x_bd.tcl
@@ -1,9 +1,9 @@
###############################################################################
-## Copyright (C) 2019-2023 Analog Devices, Inc. All rights reserved.
+## Copyright (C) 2019-2024 Analog Devices, Inc. All rights reserved.
### SPDX short identifier: ADIBSD
###############################################################################
-create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_master_rtl:1.0 ad738x_spi
+create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_engine_rtl:1.0 ad738x_spi
source $ad_hdl_dir/library/spi_engine/scripts/spi_engine.tcl
diff --git a/projects/ad7616_sdz/common/ad7616_bd.tcl b/projects/ad7616_sdz/common/ad7616_bd.tcl
index 6c6bb0256..e8f48a026 100644
--- a/projects/ad7616_sdz/common/ad7616_bd.tcl
+++ b/projects/ad7616_sdz/common/ad7616_bd.tcl
@@ -1,5 +1,5 @@
###############################################################################
-## Copyright (C) 2019-2023 Analog Devices, Inc. All rights reserved.
+## Copyright (C) 2019-2024 Analog Devices, Inc. All rights reserved.
### SPDX short identifier: ADIBSD
###############################################################################
##--------------------------------------------------------------
@@ -72,7 +72,7 @@ ad_connect busy_sync/in_bits rx_busy
ad_connect busy_sync/out_bits busy_capture/signal_in
if {$SER_PAR_N == 1} {
- create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_master_rtl:1.0 ad7616_spi
+ create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_engine_rtl:1.0 ad7616_spi
source $ad_hdl_dir/library/spi_engine/scripts/spi_engine.tcl
diff --git a/projects/ad77681evb/common/ad77681evb_bd.tcl b/projects/ad77681evb/common/ad77681evb_bd.tcl
index 28700cc5a..3cdaffcf8 100644
--- a/projects/ad77681evb/common/ad77681evb_bd.tcl
+++ b/projects/ad77681evb/common/ad77681evb_bd.tcl
@@ -1,9 +1,9 @@
###############################################################################
-## Copyright (C) 2017-2023 Analog Devices, Inc. All rights reserved.
+## Copyright (C) 2017-2024 Analog Devices, Inc. All rights reserved.
### SPDX short identifier: ADIBSD
###############################################################################
-create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_master_rtl:1.0 adc_spi
+create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_engine_rtl:1.0 adc_spi
create_bd_port -dir I adc_data_ready
@@ -23,7 +23,7 @@ current_bd_instance /spi_adc
create_bd_pin -dir I -type rst resetn
create_bd_pin -dir I drdy
create_bd_pin -dir O irq
- create_bd_intf_pin -mode Master -vlnv analog.com:interface:spi_master_rtl:1.0 m_spi
+ create_bd_intf_pin -mode Master -vlnv analog.com:interface:spi_engine_rtl:1.0 m_spi
create_bd_intf_pin -mode Master -vlnv xilinx.com:interface:axis_rtl:1.0 M_AXIS_SAMPLE
# DATA_WIDTH is set to 32
diff --git a/projects/adaq7980_sdz/common/adaq7980_bd.tcl b/projects/adaq7980_sdz/common/adaq7980_bd.tcl
index 27cb5df25..6f81d32e7 100644
--- a/projects/adaq7980_sdz/common/adaq7980_bd.tcl
+++ b/projects/adaq7980_sdz/common/adaq7980_bd.tcl
@@ -1,9 +1,9 @@
###############################################################################
-## Copyright (C) 2019-2023 Analog Devices, Inc. All rights reserved.
+## Copyright (C) 2019-2024 Analog Devices, Inc. All rights reserved.
### SPDX short identifier: ADIBSD
###############################################################################
-create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_master_rtl:1.0 adaq7980_spi
+create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_engine_rtl:1.0 adaq7980_spi
source $ad_hdl_dir/library/spi_engine/scripts/spi_engine.tcl
set data_width 16
diff --git a/projects/cn0363/common/cn0363_bd.tcl b/projects/cn0363/common/cn0363_bd.tcl
index 64a3fd0b8..11647ffcd 100644
--- a/projects/cn0363/common/cn0363_bd.tcl
+++ b/projects/cn0363/common/cn0363_bd.tcl
@@ -1,11 +1,11 @@
###############################################################################
-## Copyright (C) 2016-2023 Analog Devices, Inc. All rights reserved.
+## Copyright (C) 2016-2024 Analog Devices, Inc. All rights reserved.
### SPDX short identifier: ADIBSD
###############################################################################
source $ad_hdl_dir/library/spi_engine/scripts/spi_engine.tcl
-create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_master_rtl:1.0 spi
+create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_engine_rtl:1.0 spi
proc load_fir_filter_vector {filter_file} {
set fp [open $filter_file r]
diff --git a/projects/cn0540/common/cn0540_bd.tcl b/projects/cn0540/common/cn0540_bd.tcl
index 691234be8..3d056c604 100755
--- a/projects/cn0540/common/cn0540_bd.tcl
+++ b/projects/cn0540/common/cn0540_bd.tcl
@@ -3,7 +3,7 @@
### SPDX short identifier: ADIBSD
###############################################################################
-create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_master_rtl:1.0 adc_spi
+create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_engine_rtl:1.0 adc_spi
create_bd_intf_port -mode Master -vlnv xilinx.com:interface:iic_rtl:1.0 iic_cn0540
create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:diff_analog_io_rtl:1.0 xadc_mux
create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:diff_analog_io_rtl:1.0 xadc_vaux1
diff --git a/projects/cn0561/common/cn0561_bd.tcl b/projects/cn0561/common/cn0561_bd.tcl
index 231cb51b1..68f751aab 100644
--- a/projects/cn0561/common/cn0561_bd.tcl
+++ b/projects/cn0561/common/cn0561_bd.tcl
@@ -1,9 +1,9 @@
###############################################################################
-## Copyright (C) 2022-2023 Analog Devices, Inc. All rights reserved.
+## Copyright (C) 2022-2024 Analog Devices, Inc. All rights reserved.
### SPDX short identifier: ADIBSD
###############################################################################
-create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_master_rtl:1.0 cn0561_di
+create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_engine_rtl:1.0 cn0561_di
create_bd_port -dir O cn0561_odr
# create a SPI Engine architecture for ADC
diff --git a/projects/pulsar_adc_pmdz/common/pulsar_adc_pmdz_bd.tcl b/projects/pulsar_adc_pmdz/common/pulsar_adc_pmdz_bd.tcl
index bd5a90a80..fad10f924 100644
--- a/projects/pulsar_adc_pmdz/common/pulsar_adc_pmdz_bd.tcl
+++ b/projects/pulsar_adc_pmdz/common/pulsar_adc_pmdz_bd.tcl
@@ -1,9 +1,9 @@
###############################################################################
-## Copyright (C) 2021-2023 Analog Devices, Inc. All rights reserved.
+## Copyright (C) 2021-2024 Analog Devices, Inc. All rights reserved.
### SPDX short identifier: ADIBSD
###############################################################################
-create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_master_rtl:1.0 pulsar_adc_spi
+create_bd_intf_port -mode Master -vlnv analog.com:interface:spi_engine_rtl:1.0 pulsar_adc_spi
source $ad_hdl_dir/library/spi_engine/scripts/spi_engine.tcl
set data_width 32