From e332fa01c84f72a0b3c0eb7eb4d370d06aeeb3ec Mon Sep 17 00:00:00 2001 From: Adrian Costina Date: Thu, 30 Apr 2015 12:11:46 +0300 Subject: [PATCH] ad6676evb, daq2, fmcadc2, fmcjesdadc1, usdrx1: Updated jesd reset connection --- projects/ad6676evb/common/ad6676evb_bd.tcl | 2 +- projects/daq2/common/daq2_bd.tcl | 2 +- projects/fmcadc2/common/fmcadc2_bd.tcl | 2 +- projects/fmcjesdadc1/common/fmcjesdadc1_bd.tcl | 2 +- projects/usdrx1/common/usdrx1_bd.tcl | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/projects/ad6676evb/common/ad6676evb_bd.tcl b/projects/ad6676evb/common/ad6676evb_bd.tcl index 80d632841..6f1215fb3 100644 --- a/projects/ad6676evb/common/ad6676evb_bd.tcl +++ b/projects/ad6676evb/common/ad6676evb_bd.tcl @@ -66,7 +66,7 @@ ad_connect ad6676_clk axi_ad6676_gt/rx_clk ad_connect ad6676_clk axi_ad6676_core/rx_clk ad_connect ad6676_clk axi_ad6676_jesd/rx_core_clk ad_connect ad6676_clk axi_ad6676_dma/fifo_wr_clk -ad_connect axi_ad6676_gt/rx_rst axi_ad6676_jesd/rx_reset +ad_connect axi_ad6676_gt/rx_jesd_rst axi_ad6676_jesd/rx_reset ad_connect axi_ad6676_gt/rx_sysref axi_ad6676_jesd/rx_sysref ad_connect axi_ad6676_gt/tx_clk_g axi_ad6676_gt/tx_clk diff --git a/projects/daq2/common/daq2_bd.tcl b/projects/daq2/common/daq2_bd.tcl index 9351ba081..6273b9adf 100644 --- a/projects/daq2/common/daq2_bd.tcl +++ b/projects/daq2/common/daq2_bd.tcl @@ -165,7 +165,7 @@ ad_connect axi_daq2_gt/rx_clk_g adc_clk ad_connect axi_daq2_gt/rx_clk_g axi_daq2_gt/rx_clk ad_connect axi_daq2_gt/rx_clk_g axi_ad9680_core/rx_clk ad_connect axi_daq2_gt/rx_clk_g axi_ad9680_jesd/rx_core_clk -ad_connect axi_daq2_gt/rx_rst axi_ad9680_jesd/rx_reset +ad_connect axi_daq2_gt/rx_jesd_rst axi_ad9680_jesd/rx_reset ad_connect axi_daq2_gt/rx_sysref axi_ad9680_jesd/rx_sysref create_bd_cell -type ip -vlnv analog.com:user:util_bsplit:1.0 util_bsplit_rx_gt_charisk diff --git a/projects/fmcadc2/common/fmcadc2_bd.tcl b/projects/fmcadc2/common/fmcadc2_bd.tcl index 48c5bb67c..c15ddf6a9 100644 --- a/projects/fmcadc2/common/fmcadc2_bd.tcl +++ b/projects/fmcadc2/common/fmcadc2_bd.tcl @@ -53,7 +53,7 @@ ad_connect axi_ad9625_gt/tx_clk_g axi_ad9625_gt/tx_clk ad_connect axi_ad9625_gt/rx_clk_g axi_ad9625_gt/rx_clk ad_connect axi_ad9625_gt/rx_clk_g axi_ad9625_core/rx_clk ad_connect axi_ad9625_gt/rx_clk_g axi_ad9625_jesd/rx_core_clk -ad_connect axi_ad9625_gt/rx_rst axi_ad9625_jesd/rx_reset +ad_connect axi_ad9625_gt/rx_jesd_rst axi_ad9625_jesd/rx_reset ad_connect axi_ad9625_gt/rx_sysref axi_ad9625_jesd/rx_sysref create_bd_cell -type ip -vlnv analog.com:user:util_bsplit:1.0 util_bsplit_rx_gt_charisk diff --git a/projects/fmcjesdadc1/common/fmcjesdadc1_bd.tcl b/projects/fmcjesdadc1/common/fmcjesdadc1_bd.tcl index 70e1782be..f971a5ca7 100644 --- a/projects/fmcjesdadc1/common/fmcjesdadc1_bd.tcl +++ b/projects/fmcjesdadc1/common/fmcjesdadc1_bd.tcl @@ -112,7 +112,7 @@ ad_connect axi_ad9250_gt_rx_clk axi_ad9250_0_core/rx_clk ad_connect axi_ad9250_gt_rx_clk axi_ad9250_1_core/rx_clk ad_connect axi_ad9250_gt_rx_clk axi_ad9250_jesd/rx_core_clk ad_connect axi_ad9250_gt_rx_clk adc_clk -ad_connect axi_ad9250_gt_rx_rst axi_ad9250_gt/rx_rst +ad_connect axi_ad9250_gt_rx_rst axi_ad9250_gt/rx_jesd_rst ad_connect axi_ad9250_gt_rx_rst axi_ad9250_jesd/rx_reset ad_connect axi_ad9250_gt_rx_sysref axi_ad9250_jesd/rx_sysref diff --git a/projects/usdrx1/common/usdrx1_bd.tcl b/projects/usdrx1/common/usdrx1_bd.tcl index c54f1a151..1a882295a 100644 --- a/projects/usdrx1/common/usdrx1_bd.tcl +++ b/projects/usdrx1/common/usdrx1_bd.tcl @@ -125,7 +125,7 @@ ad_connect axi_usdrx1_gt_rx_clk axi_ad9671_core_1/rx_clk ad_connect axi_usdrx1_gt_rx_clk axi_ad9671_core_2/rx_clk ad_connect axi_usdrx1_gt_rx_clk axi_ad9671_core_3/rx_clk ad_connect axi_usdrx1_gt_rx_clk axi_usdrx1_jesd/rx_core_clk -ad_connect axi_usdrx1_gt/rx_rst axi_usdrx1_jesd/rx_reset +ad_connect axi_usdrx1_gt/rx_jesd_rst axi_usdrx1_jesd/rx_reset ad_connect axi_usdrx1_gt/rx_sysref axi_usdrx1_jesd/rx_sysref create_bd_cell -type ip -vlnv analog.com:user:util_bsplit:1.0 util_bsplit_rx_gt_charisk