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arradio- updates

main
Rejeesh Kutty 2016-05-16 12:19:30 -04:00
parent 68329de738
commit e345953bdd
1 changed files with 104 additions and 75 deletions
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179
projects/arradio/common/arradio_bd.qsys
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@ -9,17 +9,20 @@
categories="System" />
<parameter name="bonusData"><![CDATA[bonusData
{
element adc_pack
element arradio_bd
{
datum _sortIndex
datum _originalDeviceFamily
{
value = "5";
type = "int";
value = "Cyclone V";
type = "String";
}
datum sopceditor_expanded
}
element arradio_bd
{
datum _originalDeviceFamily
{
value = "1";
type = "boolean";
value = "Cyclone V";
type = "String";
}
}
element arradio_bd
@ -99,11 +102,11 @@
type = "String";
}
}
element axi_dmac_adc
element axi_adc_dma
{
datum _sortIndex
{
value = "6";
value = "7";
type = "int";
}
datum sopceditor_expanded
@ -112,7 +115,7 @@
type = "boolean";
}
}
element axi_dmac_adc.s_axi
element axi_adc_dma.s_axi
{
datum baseAddress
{
@ -124,7 +127,7 @@
{
datum _sortIndex
{
value = "8";
value = "9";
type = "int";
}
datum sopceditor_expanded
@ -145,7 +148,7 @@
{
datum _sortIndex
{
value = "7";
value = "8";
type = "int";
}
datum sopceditor_expanded
@ -158,7 +161,7 @@
{
datum _sortIndex
{
value = "10";
value = "11";
type = "int";
}
}
@ -182,7 +185,7 @@
{
datum _sortIndex
{
value = "9";
value = "10";
type = "int";
}
datum sopceditor_expanded
@ -215,6 +218,27 @@
type = "int";
}
}
element util_adc_pack
{
datum _sortIndex
{
value = "6";
type = "int";
}
datum sopceditor_expanded
{
value = "1";
type = "boolean";
}
}
element util_adc_wfifo
{
datum _sortIndex
{
value = "5";
type = "int";
}
}
}
]]></parameter>
<parameter name="clockCrossingAdapter" value="FIFO" />
@ -264,21 +288,21 @@
dir="end" />
<interface
name="axi_dmac_adc_fifo_wr_clock"
internal="axi_dmac_adc.fifo_wr_clock" />
<interface name="axi_dmac_adc_fifo_wr_if" internal="axi_dmac_adc.fifo_wr_if" />
internal="axi_adc_dma.fifo_wr_clock" />
<interface name="axi_dmac_adc_fifo_wr_if" internal="axi_adc_dma.fifo_wr_if" />
<interface
name="axi_dmac_adc_intr"
internal="axi_dmac_adc.interrupt_sender"
internal="axi_adc_dma.interrupt_sender"
type="interrupt"
dir="end" />
<interface
name="axi_dmac_adc_m_dest_axi"
internal="axi_dmac_adc.m_dest_axi"
internal="axi_adc_dma.m_dest_axi"
type="axi4"
dir="start" />
<interface
name="axi_dmac_adc_s_axi"
internal="axi_dmac_adc.s_axi"
internal="axi_adc_dma.s_axi"
type="axi4lite"
dir="end" />
<interface
@ -325,10 +349,6 @@
dir="end" />
<interface name="sys_clk" internal="sys_clk.in_clk" type="clock" dir="end" />
<interface name="sys_rst" internal="sys_rst.in_reset" type="reset" dir="end" />
<module name="adc_pack" kind="util_cpack" version="1.0" enabled="1">
<parameter name="CHANNEL_DATA_WIDTH" value="16" />
<parameter name="NUM_OF_CHANNELS" value="4" />
</module>
<module name="axi_ad9361" kind="axi_ad9361" version="1.0" enabled="1">
<parameter name="ADC_DATAPATH_DISABLE" value="0" />
<parameter name="CMOS_OR_LVDS_N" value="0" />
@ -337,7 +357,7 @@
<parameter name="DEVICE_TYPE" value="1" />
<parameter name="ID" value="0" />
</module>
<module name="axi_dmac_adc" kind="axi_dmac" version="1.0" enabled="1">
<module name="axi_adc_dma" kind="axi_dmac" version="1.0" enabled="1">
<parameter name="ASYNC_CLK_DEST_REQ" value="1" />
<parameter name="ASYNC_CLK_REQ_SRC" value="1" />
<parameter name="ASYNC_CLK_SRC_DEST" value="1" />
@ -429,11 +449,16 @@
<parameter name="SYNCHRONOUS_EDGES" value="none" />
<parameter name="USE_RESET_REQUEST" value="0" />
</module>
<connection
kind="clock"
version="15.1"
start="axi_ad9361.if_l_clk"
end="adc_pack.if_adc_clk" />
<module name="util_adc_pack" kind="util_cpack" version="1.0" enabled="1">
<parameter name="CHANNEL_DATA_WIDTH" value="16" />
<parameter name="NUM_OF_CHANNELS" value="4" />
</module>
<module name="util_adc_wfifo" kind="util_wfifo" version="1.0" enabled="1">
<parameter name="DIN_ADDRESS_WIDTH" value="8" />
<parameter name="DIN_DATA_WIDTH" value="16" />
<parameter name="DOUT_DATA_WIDTH" value="16" />
<parameter name="NUM_OF_CHANNELS" value="4" />
</module>
<connection
kind="clock"
version="15.1"
@ -448,12 +473,12 @@
kind="clock"
version="15.1"
start="axi_ad9361.if_l_clk"
end="axi_dmac_dac.if_fifo_rd_clk" />
end="util_adc_wfifo.if_din_clk" />
<connection
kind="clock"
version="15.1"
start="axi_ad9361.if_l_clk"
end="axi_dmac_adc.if_fifo_wr_clk" />
end="axi_dmac_dac.if_fifo_rd_clk" />
<connection
kind="clock"
version="15.1"
@ -464,7 +489,22 @@
kind="clock"
version="15.1"
start="mem_clk.out_clk"
end="axi_dmac_adc.m_dest_axi_clock" />
end="util_adc_pack.if_adc_clk" />
<connection
kind="clock"
version="15.1"
start="mem_clk.out_clk"
end="util_adc_wfifo.if_dout_clk" />
<connection
kind="clock"
version="15.1"
start="mem_clk.out_clk"
end="axi_adc_dma.if_fifo_wr_clk" />
<connection
kind="clock"
version="15.1"
start="mem_clk.out_clk"
end="axi_adc_dma.m_dest_axi_clock" />
<connection
kind="clock"
version="15.1"
@ -479,7 +519,7 @@
kind="clock"
version="15.1"
start="sys_clk.out_clk"
end="axi_dmac_adc.s_axi_clock" />
end="axi_adc_dma.s_axi_clock" />
<connection
kind="clock"
version="15.1"
@ -488,8 +528,8 @@
<connection
kind="conduit"
version="15.1"
start="dac_upack.fifo_ch_0"
end="axi_ad9361.fifo_ch_0_out">
start="axi_ad9361.adc_ch_0"
end="util_adc_wfifo.din_0">
<parameter name="endPort" value="" />
<parameter name="endPortLSB" value="0" />
<parameter name="startPort" value="" />
@ -499,8 +539,8 @@
<connection
kind="conduit"
version="15.1"
start="axi_ad9361.fifo_ch_0_in"
end="adc_pack.fifo_ch_0">
start="axi_ad9361.adc_ch_1"
end="util_adc_wfifo.din_1">
<parameter name="endPort" value="" />
<parameter name="endPortLSB" value="0" />
<parameter name="startPort" value="" />
@ -510,8 +550,8 @@
<connection
kind="conduit"
version="15.1"
start="axi_ad9361.fifo_ch_1_in"
end="adc_pack.fifo_ch_1">
start="util_adc_pack.adc_ch_1"
end="util_adc_wfifo.dout_1">
<parameter name="endPort" value="" />
<parameter name="endPortLSB" value="0" />
<parameter name="startPort" value="" />
@ -521,8 +561,8 @@
<connection
kind="conduit"
version="15.1"
start="axi_ad9361.fifo_ch_1_out"
end="dac_upack.fifo_ch_1">
start="axi_ad9361.adc_ch_2"
end="util_adc_wfifo.din_2">
<parameter name="endPort" value="" />
<parameter name="endPortLSB" value="0" />
<parameter name="startPort" value="" />
@ -532,8 +572,8 @@
<connection
kind="conduit"
version="15.1"
start="axi_ad9361.fifo_ch_2_in"
end="adc_pack.fifo_ch_2">
start="util_adc_pack.adc_ch_2"
end="util_adc_wfifo.dout_2">
<parameter name="endPort" value="" />
<parameter name="endPortLSB" value="0" />
<parameter name="startPort" value="" />
@ -543,8 +583,8 @@
<connection
kind="conduit"
version="15.1"
start="axi_ad9361.fifo_ch_2_out"
end="dac_upack.fifo_ch_2">
start="axi_ad9361.adc_ch_3"
end="util_adc_wfifo.din_3">
<parameter name="endPort" value="" />
<parameter name="endPortLSB" value="0" />
<parameter name="startPort" value="" />
@ -554,8 +594,8 @@
<connection
kind="conduit"
version="15.1"
start="axi_ad9361.fifo_ch_3_in"
end="adc_pack.fifo_ch_3">
start="util_adc_wfifo.dout_0"
end="util_adc_pack.adc_ch_0">
<parameter name="endPort" value="" />
<parameter name="endPortLSB" value="0" />
<parameter name="startPort" value="" />
@ -565,8 +605,8 @@
<connection
kind="conduit"
version="15.1"
start="axi_ad9361.fifo_ch_3_out"
end="dac_upack.fifo_ch_3">
start="util_adc_wfifo.dout_3"
end="util_adc_pack.adc_ch_3">
<parameter name="endPort" value="" />
<parameter name="endPortLSB" value="0" />
<parameter name="startPort" value="" />
@ -576,8 +616,8 @@
<connection
kind="conduit"
version="15.1"
start="adc_pack.if_adc_data"
end="axi_dmac_adc.if_fifo_wr_din">
start="util_adc_pack.if_adc_data"
end="axi_adc_dma.if_fifo_wr_din">
<parameter name="endPort" value="" />
<parameter name="endPortLSB" value="0" />
<parameter name="startPort" value="" />
@ -587,8 +627,8 @@
<connection
kind="conduit"
version="15.1"
start="adc_pack.if_adc_sync"
end="axi_dmac_adc.if_fifo_wr_sync">
start="util_adc_pack.if_adc_sync"
end="axi_adc_dma.if_fifo_wr_sync">
<parameter name="endPort" value="" />
<parameter name="endPortLSB" value="0" />
<parameter name="startPort" value="" />
@ -598,8 +638,8 @@
<connection
kind="conduit"
version="15.1"
start="adc_pack.if_adc_valid"
end="axi_dmac_adc.if_fifo_wr_en">
start="util_adc_pack.if_adc_valid"
end="axi_adc_dma.if_fifo_wr_en">
<parameter name="endPort" value="" />
<parameter name="endPortLSB" value="0" />
<parameter name="startPort" value="" />
@ -650,37 +690,26 @@
<parameter name="startPortLSB" value="0" />
<parameter name="width" value="0" />
</connection>
<connection
kind="conduit"
version="15.1"
start="axi_dmac_adc.if_fifo_wr_overflow"
end="axi_ad9361.if_adc_dovf">
<parameter name="endPort" value="" />
<parameter name="endPortLSB" value="0" />
<parameter name="startPort" value="" />
<parameter name="startPortLSB" value="0" />
<parameter name="width" value="0" />
</connection>
<connection
kind="reset"
version="15.1"
start="axi_ad9361.if_rst"
end="adc_pack.if_adc_rst" />
<connection
kind="reset"
version="15.1"
start="sys_rst.out_reset"
end="adc_pack.if_adc_rst" />
end="util_adc_wfifo.if_din_rst" />
<connection
kind="reset"
version="15.1"
start="mem_rst.out_reset"
end="adc_pack.if_adc_rst" />
end="util_adc_pack.if_adc_rst" />
<connection
kind="reset"
version="15.1"
start="mem_rst.out_reset"
end="axi_dmac_adc.m_dest_axi_reset" />
end="util_adc_wfifo.if_dout_rstn" />
<connection
kind="reset"
version="15.1"
start="mem_rst.out_reset"
end="axi_adc_dma.m_dest_axi_reset" />
<connection
kind="reset"
version="15.1"
@ -705,7 +734,7 @@
kind="reset"
version="15.1"
start="sys_rst.out_reset"
end="axi_dmac_adc.s_axi_reset" />
end="axi_adc_dma.s_axi_reset" />
<connection
kind="reset"
version="15.1"