From e45f0141389a96aea5c5fbc8b04abce63fb7c0ca Mon Sep 17 00:00:00 2001 From: AndreiGrozav Date: Mon, 30 Sep 2019 13:51:05 +0300 Subject: [PATCH] intel/axi_adxcvr_up: Add device spec register --- library/intel/axi_adxcvr/axi_adxcvr_up.v | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/library/intel/axi_adxcvr/axi_adxcvr_up.v b/library/intel/axi_adxcvr/axi_adxcvr_up.v index 847bf6ce6..b9864b1a4 100644 --- a/library/intel/axi_adxcvr/axi_adxcvr_up.v +++ b/library/intel/axi_adxcvr/axi_adxcvr_up.v @@ -174,8 +174,9 @@ module axi_adxcvr_up #( 10'h004: up_rdata_d <= {31'd0, up_resetn}; 10'h005: up_rdata_d <= {31'd0, up_status_int}; 10'h006: up_rdata_d <= up_status_32_s; + 10'h007: up_rdata_d <= {FPGA_TECHNOLOGY,FPGA_FAMILY,SPEED_GRADE,DEV_PACKAGE}; // [8,8,8,8] 10'h009: up_rdata_d <= up_rparam_s; - 10'h050: up_rdata_d <= {16'd0, FPGA_VOLTAGE}; // mV + 10'h050: up_rdata_d <= {16'd0, FPGA_VOLTAGE}; // mV default: up_rdata_d <= 32'd0; endcase end else begin