fmcomms5: Updated zc702 project to the latest framework
parent
fb3ee53790
commit
e58e9bc701
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@ -2,3 +2,17 @@
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source $ad_hdl_dir/projects/common/zc702/zc702_system_bd.tcl
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source $ad_hdl_dir/projects/common/zc702/zc702_system_bd.tcl
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source ../common/fmcomms5_bd.tcl
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source ../common/fmcomms5_bd.tcl
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set_property -dict [list CONFIG.PCW_FPGA2_PERIPHERAL_FREQMHZ {150.0}] $sys_ps7
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# ila (adc) master
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set ila_adc_0 [create_bd_cell -type ip -vlnv xilinx.com:ip:ila:5.0 ila_adc_0]
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set_property -dict [list CONFIG.C_MONITOR_TYPE {Native}] $ila_adc_0
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set_property -dict [list CONFIG.C_NUM_OF_PROBES {2}] $ila_adc_0
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set_property -dict [list CONFIG.C_PROBE0_WIDTH {1}] $ila_adc_0
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set_property -dict [list CONFIG.C_PROBE1_WIDTH {128}] $ila_adc_0
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set_property -dict [list CONFIG.C_EN_STRG_QUAL {1}] $ila_adc_0
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ad_connect axi_ad9361_0_clk ila_adc_0/clk
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ad_connect util_adc_pack_0/dvalid ila_adc_0/probe0
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ad_connect util_adc_pack_0/ddata ila_adc_0/probe1
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@ -1,8 +1,7 @@
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source ../../scripts/adi_env.tcl
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source ../../scripts/adi_env.tcl
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source $ad_hdl_dir/projects/scripts/adi_project.tcl
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source $ad_hdl_dir/projects/scripts/adi_project.tcl
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source $ad_hdl_dir/projects/scripts/adi_board.tcl
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adi_project_create fmcomms5_zc702
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adi_project_create fmcomms5_zc702
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adi_project_files fmcomms5_zc702 [list \
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adi_project_files fmcomms5_zc702 [list \
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@ -41,28 +41,28 @@
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module system_top (
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module system_top (
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DDR_addr,
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ddr_addr,
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DDR_ba,
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ddr_ba,
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DDR_cas_n,
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ddr_cas_n,
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DDR_ck_n,
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ddr_ck_n,
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DDR_ck_p,
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ddr_ck_p,
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DDR_cke,
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ddr_cke,
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DDR_cs_n,
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ddr_cs_n,
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DDR_dm,
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ddr_dm,
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DDR_dq,
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ddr_dq,
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DDR_dqs_n,
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ddr_dqs_n,
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DDR_dqs_p,
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ddr_dqs_p,
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DDR_odt,
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ddr_odt,
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DDR_ras_n,
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ddr_ras_n,
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DDR_reset_n,
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ddr_reset_n,
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DDR_we_n,
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ddr_we_n,
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FIXED_IO_ddr_vrn,
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fixed_io_ddr_vrn,
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FIXED_IO_ddr_vrp,
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fixed_io_ddr_vrp,
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FIXED_IO_mio,
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fixed_io_mio,
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FIXED_IO_ps_clk,
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fixed_io_ps_clk,
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FIXED_IO_ps_porb,
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fixed_io_ps_porb,
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FIXED_IO_ps_srstb,
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fixed_io_ps_srstb,
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gpio_bd,
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gpio_bd,
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@ -136,28 +136,28 @@ module system_top (
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ref_clk_p,
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ref_clk_p,
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ref_clk_n);
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ref_clk_n);
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inout [ 14:0] DDR_addr;
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inout [ 14:0] ddr_addr;
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inout [ 2:0] DDR_ba;
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inout [ 2:0] ddr_ba;
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inout DDR_cas_n;
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inout ddr_cas_n;
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inout DDR_ck_n;
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inout ddr_ck_n;
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inout DDR_ck_p;
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inout ddr_ck_p;
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inout DDR_cke;
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inout ddr_cke;
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inout DDR_cs_n;
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inout ddr_cs_n;
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inout [ 3:0] DDR_dm;
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inout [ 3:0] ddr_dm;
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inout [ 31:0] DDR_dq;
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inout [ 31:0] ddr_dq;
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inout [ 3:0] DDR_dqs_n;
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inout [ 3:0] ddr_dqs_n;
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inout [ 3:0] DDR_dqs_p;
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inout [ 3:0] ddr_dqs_p;
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inout DDR_odt;
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inout ddr_odt;
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inout DDR_ras_n;
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inout ddr_ras_n;
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inout DDR_reset_n;
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inout ddr_reset_n;
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inout DDR_we_n;
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inout ddr_we_n;
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inout FIXED_IO_ddr_vrn;
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inout fixed_io_ddr_vrn;
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inout FIXED_IO_ddr_vrp;
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inout fixed_io_ddr_vrp;
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inout [ 53:0] FIXED_IO_mio;
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inout [ 53:0] fixed_io_mio;
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inout FIXED_IO_ps_clk;
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inout fixed_io_ps_clk;
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inout FIXED_IO_ps_porb;
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inout fixed_io_ps_porb;
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inout FIXED_IO_ps_srstb;
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inout fixed_io_ps_srstb;
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inout [ 15:0] gpio_bd;
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inout [ 15:0] gpio_bd;
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@ -239,15 +239,21 @@ module system_top (
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// internal signals
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// internal signals
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wire sys_100m_resetn;
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wire sys_100m_resetn;
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wire sys_100m_clk;
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wire ref_clk_s;
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wire ref_clk_s;
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wire ref_clk;
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wire ref_clk;
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wire [ 63:0] gpio_i;
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wire [ 63:0] gpio_i;
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wire [ 63:0] gpio_o;
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wire [ 63:0] gpio_o;
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wire [ 63:0] gpio_t;
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wire [ 63:0] gpio_t;
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wire [15:0] ps_intrs;
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wire gpio_open_45_45;
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wire gpio_open_45_45;
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wire gpio_open_44_44;
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wire gpio_open_44_44;
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wire [ 2:0] spi0_csn;
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wire spi0_clk;
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wire spi0_mosi;
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wire spi0_miso;
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wire [ 2:0] spi1_csn;
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wire spi1_clk;
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wire spi1_mosi;
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wire spi1_miso;
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// multi-chip synchronization
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// multi-chip synchronization
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@ -304,31 +310,38 @@ module system_top (
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gpio_status_0, // 16
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gpio_status_0, // 16
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gpio_bd})); // 0
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gpio_bd})); // 0
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assign spi_ad9361_0 = spi0_csn[0];
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assign spi_ad9361_1 = spi0_csn[1];
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assign spi_ad5355 = spi0_csn[2];
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assign spi_clk = spi0_clk;
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assign spi_mosi = spi0_mosi;
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assign spi0_miso = spi_miso;
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system_wrapper i_system_wrapper (
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system_wrapper i_system_wrapper (
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.DDR_addr (DDR_addr),
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.ddr_addr (ddr_addr),
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.DDR_ba (DDR_ba),
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.ddr_ba (ddr_ba),
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.DDR_cas_n (DDR_cas_n),
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.ddr_cas_n (ddr_cas_n),
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.DDR_ck_n (DDR_ck_n),
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.ddr_ck_n (ddr_ck_n),
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.DDR_ck_p (DDR_ck_p),
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.ddr_ck_p (ddr_ck_p),
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.DDR_cke (DDR_cke),
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.ddr_cke (ddr_cke),
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.DDR_cs_n (DDR_cs_n),
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.ddr_cs_n (ddr_cs_n),
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.DDR_dm (DDR_dm),
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.ddr_dm (ddr_dm),
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.DDR_dq (DDR_dq),
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.ddr_dq (ddr_dq),
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.DDR_dqs_n (DDR_dqs_n),
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.ddr_dqs_n (ddr_dqs_n),
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.DDR_dqs_p (DDR_dqs_p),
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.ddr_dqs_p (ddr_dqs_p),
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.DDR_odt (DDR_odt),
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.ddr_odt (ddr_odt),
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.DDR_ras_n (DDR_ras_n),
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.ddr_ras_n (ddr_ras_n),
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.DDR_reset_n (DDR_reset_n),
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.ddr_reset_n (ddr_reset_n),
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.DDR_we_n (DDR_we_n),
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.ddr_we_n (ddr_we_n),
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.FIXED_IO_ddr_vrn (FIXED_IO_ddr_vrn),
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.fixed_io_ddr_vrn (fixed_io_ddr_vrn),
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.FIXED_IO_ddr_vrp (FIXED_IO_ddr_vrp),
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.fixed_io_ddr_vrp (fixed_io_ddr_vrp),
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.FIXED_IO_mio (FIXED_IO_mio),
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.fixed_io_mio (fixed_io_mio),
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.FIXED_IO_ps_clk (FIXED_IO_ps_clk),
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.fixed_io_ps_clk (fixed_io_ps_clk),
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.FIXED_IO_ps_porb (FIXED_IO_ps_porb),
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.fixed_io_ps_porb (fixed_io_ps_porb),
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.FIXED_IO_ps_srstb (FIXED_IO_ps_srstb),
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.fixed_io_ps_srstb (fixed_io_ps_srstb),
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.GPIO_I (gpio_i),
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.gpio_i (gpio_i),
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.GPIO_O (gpio_o),
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.gpio_o (gpio_o),
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.GPIO_T (gpio_t),
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.gpio_t (gpio_t),
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.hdmi_data (hdmi_data),
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.hdmi_data (hdmi_data),
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.hdmi_data_e (hdmi_data_e),
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.hdmi_data_e (hdmi_data_e),
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.hdmi_hsync (hdmi_hsync),
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.hdmi_hsync (hdmi_hsync),
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@ -336,24 +349,18 @@ module system_top (
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.hdmi_vsync (hdmi_vsync),
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.hdmi_vsync (hdmi_vsync),
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.iic_main_scl_io (iic_scl),
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.iic_main_scl_io (iic_scl),
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.iic_main_sda_io (iic_sda),
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.iic_main_sda_io (iic_sda),
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.ps_intr_0 (ps_intrs[0]),
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.ps_intr_00 (1'b0),
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.ps_intr_1 (ps_intrs[1]),
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.ps_intr_01 (1'b0),
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.ps_intr_10 (ps_intrs[10]),
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.ps_intr_02 (1'b0),
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.ps_intr_11 (ps_intrs[11]),
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.ps_intr_03 (1'b0),
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.ps_intr_12 (ps_intrs[12]),
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.ps_intr_04 (1'b0),
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.ps_intr_13 (ps_intrs[13]),
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.ps_intr_05 (1'b0),
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.ps_intr_2 (ps_intrs[2]),
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.ps_intr_06 (1'b0),
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.ps_intr_3 (ps_intrs[3]),
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.ps_intr_07 (1'b0),
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.ps_intr_4 (ps_intrs[4]),
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.ps_intr_08 (1'b0),
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.ps_intr_5 (ps_intrs[5]),
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.ps_intr_09 (1'b0),
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.ps_intr_6 (ps_intrs[6]),
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.ps_intr_10 (1'b0),
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.ps_intr_7 (ps_intrs[7]),
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.ps_intr_11 (1'b0),
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.ps_intr_8 (ps_intrs[8]),
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.ps_intr_9 (ps_intrs[9]),
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.ad9361_dac_dma_irq (ps_intrs[12]),
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.ad9361_adc_dma_irq (ps_intrs[13]),
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.fmcomms5_gpio_irq(),
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.fmcomms5_spi_irq(),
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.rx_clk_in_0_n (rx_clk_in_0_n),
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.rx_clk_in_0_n (rx_clk_in_0_n),
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.rx_clk_in_0_p (rx_clk_in_0_p),
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.rx_clk_in_0_p (rx_clk_in_0_p),
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.rx_clk_in_1_n (rx_clk_in_1_n),
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.rx_clk_in_1_n (rx_clk_in_1_n),
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@ -367,16 +374,24 @@ module system_top (
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.rx_frame_in_1_n (rx_frame_in_1_n),
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.rx_frame_in_1_n (rx_frame_in_1_n),
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.rx_frame_in_1_p (rx_frame_in_1_p),
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.rx_frame_in_1_p (rx_frame_in_1_p),
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.spdif (spdif),
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.spdif (spdif),
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.spi_csn_0_i (1'b1),
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.spi0_clk_i (spi0_clk),
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.spi_csn_0_o (spi_ad9361_0),
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.spi0_clk_o (spi0_clk),
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.spi_csn_1_o (spi_ad9361_1),
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.spi0_csn_0_o (spi0_csn[0]),
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.spi_csn_2_o (spi_ad5355),
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.spi0_csn_1_o (spi0_csn[1]),
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.spi_miso_i (spi_miso),
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.spi0_csn_2_o (spi0_csn[2]),
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.spi_mosi_i (1'b0),
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.spi0_csn_i (1'b1),
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.spi_mosi_o (spi_mosi),
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.spi0_sdi_i (spi0_miso),
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.spi_sclk_i (1'b0),
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.spi0_sdo_i (spi0_mosi),
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.spi_sclk_o (spi_clk),
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.spi0_sdo_o (spi0_mosi),
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.sys_100m_clk (sys_100m_clk),
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.spi1_clk_i (spi1_clk),
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.spi1_clk_o (spi1_clk),
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.spi1_csn_0_o (spi1_csn[0]),
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.spi1_csn_1_o (spi1_csn[1]),
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.spi1_csn_2_o (spi1_csn[2]),
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.spi1_csn_i (1'b1),
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.spi1_sdi_i (1'b1),
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.spi1_sdo_i (spi1_mosi),
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.spi1_sdo_o (spi1_mosi),
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.sys_100m_resetn (sys_100m_resetn),
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.sys_100m_resetn (sys_100m_resetn),
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.tx_clk_out_0_n (tx_clk_out_0_n),
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.tx_clk_out_0_n (tx_clk_out_0_n),
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.tx_clk_out_0_p (tx_clk_out_0_p),
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.tx_clk_out_0_p (tx_clk_out_0_p),
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