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axi_laser_driver: Define up_pulse_s wire in regmap

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Istvan Csomortani 2019-10-14 15:58:46 +03:00 committed by István Csomortáni
parent 5bcaf05355
commit e7636f0380
1 changed files with 3 additions and 2 deletions
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5
library/axi_laser_driver/axi_laser_driver_regmap.v
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@ -101,6 +101,7 @@ module axi_laser_driver_regmap #(
wire [2:0] up_irq_pending_s; wire [2:0] up_irq_pending_s;
wire [2:0] up_irq_trigger_s; wire [2:0] up_irq_trigger_s;
wire [2:0] up_irq_source_clear_s; wire [2:0] up_irq_source_clear_s;
wire up_pulse_s;
wire up_driver_otw_n_enter_s; wire up_driver_otw_n_enter_s;
wire up_driver_otw_n_exit_s; wire up_driver_otw_n_exit_s;
@ -200,7 +201,7 @@ module axi_laser_driver_regmap #(
// temperature warning signal // temperature warning signal
assign up_irq_pending_s = ~up_irq_mask & up_irq_source; assign up_irq_pending_s = ~up_irq_mask & up_irq_source;
assign up_irq_trigger_s = {up_driver_otw_n_exit_s, up_driver_otw_n_enter_s, up_pulse}; assign up_irq_trigger_s = {up_driver_otw_n_exit_s, up_driver_otw_n_enter_s, up_pulse_s};
assign up_irq_source_clear_s = (up_wreq_int_s == 1'b1 && up_waddr[3:0] == 4'hA) ? up_wdata[2:0] : 3'b000; assign up_irq_source_clear_s = (up_wreq_int_s == 1'b1 && up_waddr[3:0] == 4'hA) ? up_wdata[2:0] : 3'b000;
always @(posedge up_clk) begin always @(posedge up_clk) begin
@ -237,7 +238,7 @@ module axi_laser_driver_regmap #(
.in_bits (pulse), .in_bits (pulse),
.out_clk (up_clk), .out_clk (up_clk),
.out_resetn (1'b1), .out_resetn (1'b1),
.out_bits (up_pulse)); .out_bits (up_pulse_s));
sync_bits #( sync_bits #(
.NUM_OF_BITS (2), .NUM_OF_BITS (2),