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adaq7980: Expouse the ADC sampling rate in system_bd.tcl 

This way the user do not need to modify the block design, just
set the required rate in system_bd.tcl.

This commit does not contain any functional changes.
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Istvan Csomortani 2018-03-22 14:06:46 +02:00 committed by István Csomortáni
parent bfc8ec28c3
commit e782ed06cb
2 changed files with 7 additions and 1 deletions
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4
projects/adaq7980_sdz/common/adaq7980_bd.tcl
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@ -25,7 +25,9 @@ current_bd_instance /spi
## to setup the sample rate of the system change the PULSE_PERIOD value
## the acutal sample rate will be PULSE_PERIOD * (1/sys_cpu_clk)
ad_ip_parameter trigger_gen CONFIG.PULSE_PERIOD 100
set cycle_per_sec_100mhz 100000000
set sampling_cycle [expr int(ceil(double($cycle_per_sec_100mhz) / $adc_sampling_rate))]
ad_ip_parameter trigger_gen CONFIG.PULSE_PERIOD $sampling_cycle
ad_ip_parameter trigger_gen CONFIG.PULSE_WIDTH 1
ad_ip_parameter execution CONFIG.NUM_OF_CS 1

4
projects/adaq7980_sdz/zed/system_bd.tcl
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@ -1,4 +1,8 @@
source $ad_hdl_dir/projects/common/zed/zed_system_bd.tcl
# specify ADC sampling rate in samples/seconds -- default is 1 MSPS
set adc_sampling_rate 1000000
source ../common/adaq7980_bd.tcl