From e794d04cd1e2b84ecd73973d63ad085426c7967c Mon Sep 17 00:00:00 2001 From: Laszlo Nagy Date: Thu, 28 Jun 2018 12:14:14 +0100 Subject: [PATCH] axi_dmac: renamed .h files to .vh Vivado recognises .h files as C header files, the expected extension for Verilog Header is .vh This causes issues in simulating block designs since these files won't be exported for the simulation even if they are part of the simulation fileset. --- library/axi_dmac/Makefile | 4 ++-- library/axi_dmac/address_generator.v | 2 +- library/axi_dmac/axi_dmac_burst_memory.v | 2 +- library/axi_dmac/axi_dmac_hw.tcl | 4 ++-- library/axi_dmac/axi_dmac_ip.tcl | 4 ++-- library/axi_dmac/data_mover.v | 2 +- library/axi_dmac/dest_axi_stream.v | 2 +- library/axi_dmac/dest_fifo_inf.v | 2 +- library/axi_dmac/{inc_id.h => inc_id.vh} | 0 library/axi_dmac/request_arb.v | 2 +- library/axi_dmac/request_generator.v | 2 +- library/axi_dmac/{resp.h => resp.vh} | 0 library/axi_dmac/response_generator.v | 4 ++-- library/axi_dmac/response_handler.v | 4 ++-- library/axi_dmac/src_axi_mm.v | 4 ++-- library/scripts/adi_ip_alt.tcl | 2 +- 16 files changed, 20 insertions(+), 20 deletions(-) rename library/axi_dmac/{inc_id.h => inc_id.vh} (100%) rename library/axi_dmac/{resp.h => resp.vh} (100%) diff --git a/library/axi_dmac/Makefile b/library/axi_dmac/Makefile index 7ed938bf3..57860f2ba 100644 --- a/library/axi_dmac/Makefile +++ b/library/axi_dmac/Makefile @@ -22,10 +22,10 @@ GENERIC_DEPS += data_mover.v GENERIC_DEPS += dest_axi_mm.v GENERIC_DEPS += dest_axi_stream.v GENERIC_DEPS += dest_fifo_inf.v -GENERIC_DEPS += inc_id.h +GENERIC_DEPS += inc_id.vh GENERIC_DEPS += request_arb.v GENERIC_DEPS += request_generator.v -GENERIC_DEPS += resp.h +GENERIC_DEPS += resp.vh GENERIC_DEPS += response_generator.v GENERIC_DEPS += response_handler.v GENERIC_DEPS += splitter.v diff --git a/library/axi_dmac/address_generator.v b/library/axi_dmac/address_generator.v index f94fb5075..27513a2c8 100644 --- a/library/axi_dmac/address_generator.v +++ b/library/axi_dmac/address_generator.v @@ -71,7 +71,7 @@ module dmac_address_generator #( localparam MAX_BEATS_PER_BURST = {1'b1,{BEATS_PER_BURST_WIDTH{1'b0}}}; localparam MAX_LENGTH = {BEATS_PER_BURST_WIDTH{1'b1}}; -`include "inc_id.h" +`include "inc_id.vh" assign burst = 2'b01; assign prot = 3'b000; diff --git a/library/axi_dmac/axi_dmac_burst_memory.v b/library/axi_dmac/axi_dmac_burst_memory.v index 5c6606000..f4039e9cb 100644 --- a/library/axi_dmac/axi_dmac_burst_memory.v +++ b/library/axi_dmac/axi_dmac_burst_memory.v @@ -147,7 +147,7 @@ wire dest_ready; wire [DATA_WIDTH-1:0] dest_mem_data; wire dest_mem_data_ready; -`include "inc_id.h" +`include "inc_id.vh" generate if (ID_WIDTH >= 3) begin assign src_id_reduced = {src_id_reduced_msb,src_id[ID_WIDTH-3:0]}; diff --git a/library/axi_dmac/axi_dmac_hw.tcl b/library/axi_dmac/axi_dmac_hw.tcl index 98047c9a5..ecc333e7c 100644 --- a/library/axi_dmac/axi_dmac_hw.tcl +++ b/library/axi_dmac/axi_dmac_hw.tcl @@ -19,8 +19,8 @@ ad_ip_files axi_dmac [list \ $ad_hdl_dir/library/common/up_axi.v \ $ad_hdl_dir/library/util_axis_fifo/util_axis_fifo.v \ $ad_hdl_dir/library/common/ad_mem.v \ - inc_id.h \ - resp.h \ + inc_id.vh \ + resp.vh \ axi_dmac_burst_memory.v \ axi_dmac_regmap.v \ axi_dmac_regmap_request.v \ diff --git a/library/axi_dmac/axi_dmac_ip.tcl b/library/axi_dmac/axi_dmac_ip.tcl index 87166a9e2..bd89260df 100644 --- a/library/axi_dmac/axi_dmac_ip.tcl +++ b/library/axi_dmac/axi_dmac_ip.tcl @@ -7,8 +7,8 @@ adi_ip_create axi_dmac adi_ip_files axi_dmac [list \ "$ad_hdl_dir/library/common/ad_mem.v" \ "$ad_hdl_dir/library/common/up_axi.v" \ - "inc_id.h" \ - "resp.h" \ + "inc_id.vh" \ + "resp.vh" \ "axi_dmac_burst_memory.v" \ "axi_dmac_regmap.v" \ "axi_dmac_regmap_request.v" \ diff --git a/library/axi_dmac/data_mover.v b/library/axi_dmac/data_mover.v index 6255013fd..192030489 100644 --- a/library/axi_dmac/data_mover.v +++ b/library/axi_dmac/data_mover.v @@ -68,7 +68,7 @@ module dmac_data_mover #( localparam BEAT_COUNTER_MAX = {BEATS_PER_BURST_WIDTH{1'b1}}; -`include "inc_id.h" +`include "inc_id.vh" reg [BEATS_PER_BURST_WIDTH-1:0] last_burst_length = 'h00; reg [BEATS_PER_BURST_WIDTH-1:0] beat_counter = 'h00; diff --git a/library/axi_dmac/dest_axi_stream.v b/library/axi_dmac/dest_axi_stream.v index 442bf3428..078f1323b 100644 --- a/library/axi_dmac/dest_axi_stream.v +++ b/library/axi_dmac/dest_axi_stream.v @@ -72,7 +72,7 @@ module dmac_dest_axi_stream #( output [1:0] response_resp ); -`include "inc_id.h" +`include "inc_id.vh" reg data_enabled = 1'b0; reg req_xlast_d = 1'b0; diff --git a/library/axi_dmac/dest_fifo_inf.v b/library/axi_dmac/dest_fifo_inf.v index 739768efb..149984ad8 100644 --- a/library/axi_dmac/dest_fifo_inf.v +++ b/library/axi_dmac/dest_fifo_inf.v @@ -71,7 +71,7 @@ module dmac_dest_fifo_inf #( output [1:0] response_resp ); -`include "inc_id.h" +`include "inc_id.vh" reg active = 1'b0; diff --git a/library/axi_dmac/inc_id.h b/library/axi_dmac/inc_id.vh similarity index 100% rename from library/axi_dmac/inc_id.h rename to library/axi_dmac/inc_id.vh diff --git a/library/axi_dmac/request_arb.v b/library/axi_dmac/request_arb.v index ef86bfa50..f952ba536 100644 --- a/library/axi_dmac/request_arb.v +++ b/library/axi_dmac/request_arb.v @@ -706,7 +706,7 @@ sync_bits #( .out(src_request_id) ); -`include "inc_id.h" +`include "inc_id.vh" function compare_id; input [ID_WIDTH-1:0] a; diff --git a/library/axi_dmac/request_generator.v b/library/axi_dmac/request_generator.v index 3e33c615e..3d72538ef 100644 --- a/library/axi_dmac/request_generator.v +++ b/library/axi_dmac/request_generator.v @@ -53,7 +53,7 @@ module dmac_request_generator #( output eot ); -`include "inc_id.h" +`include "inc_id.vh" /* * Here we only need to count the number of bursts, which means we can ignore diff --git a/library/axi_dmac/resp.h b/library/axi_dmac/resp.vh similarity index 100% rename from library/axi_dmac/resp.h rename to library/axi_dmac/resp.vh diff --git a/library/axi_dmac/response_generator.v b/library/axi_dmac/response_generator.v index 6ed50c0f6..94b2fd376 100644 --- a/library/axi_dmac/response_generator.v +++ b/library/axi_dmac/response_generator.v @@ -54,8 +54,8 @@ module dmac_response_generator #( output [1:0] resp_resp ); -`include "inc_id.h" -`include "resp.h" +`include "inc_id.vh" +`include "resp.vh" assign resp_resp = RESP_OKAY; assign resp_eot = eot; diff --git a/library/axi_dmac/response_handler.v b/library/axi_dmac/response_handler.v index 5e3184fb9..cb1509d47 100644 --- a/library/axi_dmac/response_handler.v +++ b/library/axi_dmac/response_handler.v @@ -58,8 +58,8 @@ module dmac_response_handler #( output [1:0] resp_resp ); -`include "resp.h" -`include "inc_id.h" +`include "resp.vh" +`include "inc_id.vh" assign resp_resp = bresp; assign resp_eot = eot; diff --git a/library/axi_dmac/src_axi_mm.v b/library/axi_dmac/src_axi_mm.v index 54b7bf592..347fbb109 100644 --- a/library/axi_dmac/src_axi_mm.v +++ b/library/axi_dmac/src_axi_mm.v @@ -88,7 +88,7 @@ module dmac_src_mm_axi #( input [ 1:0] m_axi_rresp ); -`include "inc_id.h" +`include "inc_id.vh" reg [ID_WIDTH-1:0] id = 'h00; @@ -170,7 +170,7 @@ always @(posedge m_axi_aclk) begin end /* TODO -`include "resp.h" +`include "resp.vh" assign response_valid = 1'b0; assign response_resp = RESP_OKAY; diff --git a/library/scripts/adi_ip_alt.tcl b/library/scripts/adi_ip_alt.tcl index c788b5af0..1809ab9d0 100644 --- a/library/scripts/adi_ip_alt.tcl +++ b/library/scripts/adi_ip_alt.tcl @@ -150,7 +150,7 @@ proc ad_ip_addfile {pname pfile} { add_fileset_file $pmodule VERILOG PATH $pfile return } - if {$ptype eq ".h"} { + if {$ptype eq ".vh"} { add_fileset_file $pmodule VERILOG_INCLUDE PATH $pfile return }