zcy
/
pluto_hdl_adi
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

axi_clkgen: Added a second input clock option

main
Adrian Costina 2015-11-06 17:55:29 +02:00
parent afc4274ee3
commit e7fd964874
3 changed files with 14 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
library/axi_clkgen/axi_clkgen.v
View File

@ -41,6 +41,7 @@ module axi_clkgen (
// clocks
clk,
clk2,
clk_0,
clk_1,
@ -71,6 +72,7 @@ module axi_clkgen (
parameter ID = 0;
parameter DEVICE_TYPE = 0;
parameter CLKIN_PERIOD = 5.0;
parameter CLKIN2_PERIOD = 5.0;
parameter VCO_DIV = 11;
parameter VCO_MUL = 49;
parameter CLK0_DIV = 6;
@ -79,6 +81,7 @@ module axi_clkgen (
// clocks
input clk;
input clk2;
output clk_0;
output clk_1;
@ -191,12 +194,14 @@ module axi_clkgen (
ad_mmcm_drp #(
.MMCM_DEVICE_TYPE (DEVICE_TYPE),
.MMCM_CLKIN_PERIOD (CLKIN_PERIOD),
.MMCM_CLKIN2_PERIOD (CLKIN2_PERIOD),
.MMCM_VCO_DIV (VCO_DIV),
.MMCM_VCO_MUL (VCO_MUL),
.MMCM_CLK0_DIV (CLK0_DIV),
.MMCM_CLK1_DIV (CLK1_DIV))
i_mmcm_drp (
.clk (clk),
.clk2 (clk2),
.mmcm_rst (mmcm_rst),
.mmcm_clk_0 (clk_0),
.mmcm_clk_1 (clk_1),

2
library/axi_clkgen/axi_clkgen_ip.tcl
View File

@ -17,6 +17,8 @@ adi_ip_properties axi_clkgen
ipx::remove_bus_interface {clk} [ipx::current_core]
ipx::associate_bus_interfaces -busif s_axi -clock s_axi_aclk [ipx::current_core]
set_property driver_value 0 [ipx::get_ports *clk2* -of_objects [ipx::current_core]]
adi_ip_constraints axi_clkgen [list \
"axi_clkgen_constr.xdc" ]

9
library/common/ad_mmcm_drp.v
View File

@ -43,6 +43,7 @@ module ad_mmcm_drp (
// clocks
clk,
clk2,
mmcm_rst,
mmcm_clk_0,
mmcm_clk_1,
@ -66,6 +67,7 @@ module ad_mmcm_drp (
localparam MMCM_DEVICE_VIRTEX6 = 1;
parameter MMCM_CLKIN_PERIOD = 1.667;
parameter MMCM_CLKIN2_PERIOD = 1.667;
parameter MMCM_VCO_DIV = 6;
parameter MMCM_VCO_MUL = 12.000;
parameter MMCM_CLK0_DIV = 2.000;
@ -74,6 +76,7 @@ module ad_mmcm_drp (
// clocks
input clk;
input clk2;
input mmcm_rst;
output mmcm_clk_0;
output mmcm_clk_1;
@ -146,6 +149,7 @@ module ad_mmcm_drp (
.CLKOUT1_DUTY_CYCLE (0.500),
.CLKOUT1_USE_FINE_PS ("FALSE"),
.CLKIN1_PERIOD (MMCM_CLKIN_PERIOD),
.CLKIN2_PERIOD (MMCM_CLKIN2_PERIOD),
.REF_JITTER1 (0.010))
i_mmcm (
.CLKIN1 (clk),
@ -171,7 +175,7 @@ module ad_mmcm_drp (
.CLKOUT4 (),
.CLKOUT5 (),
.CLKOUT6 (),
.CLKIN2 (1'b0),
.CLKIN2 (clk2),
.CLKINSEL (1'b1),
.PSCLK (1'b0),
.PSEN (1'b0),
@ -202,6 +206,7 @@ module ad_mmcm_drp (
.CLKOUT1_DUTY_CYCLE (0.500),
.CLKOUT1_USE_FINE_PS ("FALSE"),
.CLKIN1_PERIOD (MMCM_CLKIN_PERIOD),
.CLKIN2_PERIOD (MMCM_CLKIN2_PERIOD),
.REF_JITTER1 (0.010))
i_mmcm (
.CLKIN1 (clk),
@ -227,7 +232,7 @@ module ad_mmcm_drp (
.CLKOUT4 (),
.CLKOUT5 (),
.CLKOUT6 (),
.CLKIN2 (1'b0),
.CLKIN2 (clk2),
.CLKINSEL (1'b1),
.PSCLK (1'b0),
.PSEN (1'b0),