From e982232d756d322fa5c4f45e2fc089f70dd84787 Mon Sep 17 00:00:00 2001 From: Adrian Costina Date: Thu, 7 Jun 2018 17:29:52 +0300 Subject: [PATCH] adrv9009: Increased DMA clock frequency to ~333 MHz, by enabling AXI SLICES for DMAs --- projects/adrv9009/common/adrv9009_bd.tcl | 12 ++++++------ projects/adrv9009/zcu102/system_bd.tcl | 4 ++-- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/projects/adrv9009/common/adrv9009_bd.tcl b/projects/adrv9009/common/adrv9009_bd.tcl index 52256cd5c..442da458b 100644 --- a/projects/adrv9009/common/adrv9009_bd.tcl +++ b/projects/adrv9009/common/adrv9009_bd.tcl @@ -29,14 +29,14 @@ ad_ip_instance axi_dmac axi_adrv9009_tx_dma ad_ip_parameter axi_adrv9009_tx_dma CONFIG.DMA_TYPE_SRC 0 ad_ip_parameter axi_adrv9009_tx_dma CONFIG.DMA_TYPE_DEST 1 ad_ip_parameter axi_adrv9009_tx_dma CONFIG.CYCLIC 1 -ad_ip_parameter axi_adrv9009_tx_dma CONFIG.AXI_SLICE_SRC 0 -ad_ip_parameter axi_adrv9009_tx_dma CONFIG.AXI_SLICE_DEST 1 ad_ip_parameter axi_adrv9009_tx_dma CONFIG.ASYNC_CLK_DEST_REQ 1 ad_ip_parameter axi_adrv9009_tx_dma CONFIG.ASYNC_CLK_SRC_DEST 1 ad_ip_parameter axi_adrv9009_tx_dma CONFIG.ASYNC_CLK_REQ_SRC 1 ad_ip_parameter axi_adrv9009_tx_dma CONFIG.DMA_2D_TRANSFER 0 ad_ip_parameter axi_adrv9009_tx_dma CONFIG.DMA_DATA_WIDTH_DEST 128 ad_ip_parameter axi_adrv9009_tx_dma CONFIG.MAX_BYTES_PER_BURST 256 +ad_ip_parameter axi_adrv9009_tx_dma CONFIG.AXI_SLICE_DEST true +ad_ip_parameter axi_adrv9009_tx_dma CONFIG.AXI_SLICE_SRC true # adc peripherals @@ -63,14 +63,14 @@ ad_ip_parameter axi_adrv9009_rx_dma CONFIG.DMA_TYPE_SRC 2 ad_ip_parameter axi_adrv9009_rx_dma CONFIG.DMA_TYPE_DEST 0 ad_ip_parameter axi_adrv9009_rx_dma CONFIG.CYCLIC 0 ad_ip_parameter axi_adrv9009_rx_dma CONFIG.SYNC_TRANSFER_START 1 -ad_ip_parameter axi_adrv9009_rx_dma CONFIG.AXI_SLICE_SRC 0 -ad_ip_parameter axi_adrv9009_rx_dma CONFIG.AXI_SLICE_DEST 0 ad_ip_parameter axi_adrv9009_rx_dma CONFIG.ASYNC_CLK_DEST_REQ 1 ad_ip_parameter axi_adrv9009_rx_dma CONFIG.ASYNC_CLK_SRC_DEST 1 ad_ip_parameter axi_adrv9009_rx_dma CONFIG.ASYNC_CLK_REQ_SRC 1 ad_ip_parameter axi_adrv9009_rx_dma CONFIG.DMA_2D_TRANSFER 0 ad_ip_parameter axi_adrv9009_rx_dma CONFIG.DMA_DATA_WIDTH_SRC 64 ad_ip_parameter axi_adrv9009_rx_dma CONFIG.MAX_BYTES_PER_BURST 256 +ad_ip_parameter axi_adrv9009_rx_dma CONFIG.AXI_SLICE_DEST true +ad_ip_parameter axi_adrv9009_rx_dma CONFIG.AXI_SLICE_SRC true # adc-os peripherals @@ -97,14 +97,14 @@ ad_ip_parameter axi_adrv9009_rx_os_dma CONFIG.DMA_TYPE_SRC 2 ad_ip_parameter axi_adrv9009_rx_os_dma CONFIG.DMA_TYPE_DEST 0 ad_ip_parameter axi_adrv9009_rx_os_dma CONFIG.CYCLIC 0 ad_ip_parameter axi_adrv9009_rx_os_dma CONFIG.SYNC_TRANSFER_START 1 -ad_ip_parameter axi_adrv9009_rx_os_dma CONFIG.AXI_SLICE_SRC 0 -ad_ip_parameter axi_adrv9009_rx_os_dma CONFIG.AXI_SLICE_DEST 0 ad_ip_parameter axi_adrv9009_rx_os_dma CONFIG.ASYNC_CLK_DEST_REQ 1 ad_ip_parameter axi_adrv9009_rx_os_dma CONFIG.ASYNC_CLK_SRC_DEST 1 ad_ip_parameter axi_adrv9009_rx_os_dma CONFIG.ASYNC_CLK_REQ_SRC 1 ad_ip_parameter axi_adrv9009_rx_os_dma CONFIG.DMA_2D_TRANSFER 0 ad_ip_parameter axi_adrv9009_rx_os_dma CONFIG.DMA_DATA_WIDTH_SRC 64 ad_ip_parameter axi_adrv9009_rx_os_dma CONFIG.MAX_BYTES_PER_BURST 256 +ad_ip_parameter axi_adrv9009_rx_os_dma CONFIG.AXI_SLICE_DEST true +ad_ip_parameter axi_adrv9009_rx_os_dma CONFIG.AXI_SLICE_SRC true # common cores diff --git a/projects/adrv9009/zcu102/system_bd.tcl b/projects/adrv9009/zcu102/system_bd.tcl index 0ff212cb6..cc5a801de 100644 --- a/projects/adrv9009/zcu102/system_bd.tcl +++ b/projects/adrv9009/zcu102/system_bd.tcl @@ -19,10 +19,10 @@ ad_ip_parameter axi_adrv9009_rx_os_dma CONFIG.FIFO_SIZE 32 ad_ip_parameter axi_adrv9009_tx_dma CONFIG.FIFO_SIZE 32 ad_ip_instance clk_wiz dma_clk_wiz -ad_ip_parameter dma_clk_wiz CONFIG.PRIMITIVE PLL +ad_ip_parameter dma_clk_wiz CONFIG.PRIMITIVE MMCM ad_ip_parameter dma_clk_wiz CONFIG.RESET_TYPE ACTIVE_LOW ad_ip_parameter dma_clk_wiz CONFIG.USE_LOCKED false -ad_ip_parameter dma_clk_wiz CONFIG.CLKOUT1_REQUESTED_OUT_FREQ 325 +ad_ip_parameter dma_clk_wiz CONFIG.CLKOUT1_REQUESTED_OUT_FREQ 332.9 ad_ip_parameter dma_clk_wiz CONFIG.PRIM_SOURCE No_buffer ad_connect sys_cpu_clk dma_clk_wiz/clk_in1