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avl_adxcvr: Derive PLL and core clock frequency from lane rate 

The PLL frequency must be half of the lane rate and the core clock rate
must be lane rate divided by 40. There is no other option, otherwise things
wont work.

Instead of having to manually specify PLL and core clock frequency derive
them in the transceiver script. This reduces the risk of accidental
misconfiguration.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
main
Lars-Peter Clausen 2017-07-28 10:58:05 +02:00
parent a0f4adabd0
commit f0655e63a6
6 changed files with 3 additions and 24 deletions
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9
library/altera/avl_adxcvr/avl_adxcvr_hw.tcl
View File

@ -14,9 +14,7 @@ ad_ip_parameter ID INTEGER 0 false
ad_ip_parameter PCS_CONFIG STRING "JESD_PCS_CFG2" false
ad_ip_parameter LANE_RATE FLOAT 10000 false
ad_ip_parameter SYSCLK_FREQUENCY FLOAT 100.0 false
ad_ip_parameter PLLCLK_FREQUENCY FLOAT 5000.0 false
ad_ip_parameter REFCLK_FREQUENCY FLOAT 500.0 false
ad_ip_parameter CORECLK_FREQUENCY FLOAT 250.0 false
ad_ip_parameter NUM_OF_LANES INTEGER 4 false
ad_ip_parameter NUM_OF_CONVS INTEGER 2 false
ad_ip_parameter FRM_BCNT INTEGER 1 false
@ -26,9 +24,7 @@ ad_ip_parameter HD INTEGER 1 false
set_parameter_property LANE_RATE DISPLAY_UNITS "Mbps"
set_parameter_property SYSCLK_FREQUENCY UNITS Megahertz
set_parameter_property PLLCLK_FREQUENCY UNITS Megahertz
set_parameter_property REFCLK_FREQUENCY UNITS Megahertz
set_parameter_property CORECLK_FREQUENCY UNITS Megahertz
proc p_avl_adxcvr {} {
@ -39,15 +35,16 @@ proc p_avl_adxcvr {} {
set m_num_of_lanes [get_parameter_value "NUM_OF_LANES"]
set m_device_family [get_parameter_value "DEVICE_FAMILY"]
set m_sysclk_frequency [get_parameter_value "SYSCLK_FREQUENCY"]
set m_pllclk_frequency [get_parameter_value "PLLCLK_FREQUENCY"]
set m_refclk_frequency [get_parameter_value "REFCLK_FREQUENCY"]
set m_coreclk_frequency [get_parameter_value "CORECLK_FREQUENCY"]
set m_num_of_convs [get_parameter_value "NUM_OF_CONVS"]
set m_frm_bcnt [get_parameter_value "FRM_BCNT"]
set m_frm_scnt [get_parameter_value "FRM_SCNT"]
set m_mf_fcnt [get_parameter_value "MF_FCNT"]
set m_hd [get_parameter_value "HD"]
set m_pllclk_frequency [expr $m_lane_rate / 2]
set m_coreclk_frequency [expr $m_lane_rate / 40]
add_instance alt_sys_clk clock_source
set_instance_parameter_value alt_sys_clk {clockFrequency} [expr $m_sysclk_frequency*1000000]
add_interface sys_clk clock sink

6
projects/adrv9371x/common/adrv9371x_qsys.tcl
View File

@ -6,9 +6,7 @@ set_instance_parameter_value avl_ad9371_tx_xcvr {ID} {0}
set_instance_parameter_value avl_ad9371_tx_xcvr {TX_OR_RX_N} {1}
set_instance_parameter_value avl_ad9371_tx_xcvr {PCS_CONFIG} {JESD_PCS_CFG2}
set_instance_parameter_value avl_ad9371_tx_xcvr {LANE_RATE} {4915.2}
set_instance_parameter_value avl_ad9371_tx_xcvr {PLLCLK_FREQUENCY} {2457.6}
set_instance_parameter_value avl_ad9371_tx_xcvr {REFCLK_FREQUENCY} {122.88}
set_instance_parameter_value avl_ad9371_tx_xcvr {CORECLK_FREQUENCY} {122.88}
set_instance_parameter_value avl_ad9371_tx_xcvr {NUM_OF_LANES} {4}
set_instance_parameter_value avl_ad9371_tx_xcvr {NUM_OF_CONVS} {4}
set_instance_parameter_value avl_ad9371_tx_xcvr {FRM_BCNT} {2}
@ -59,9 +57,7 @@ set_instance_parameter_value avl_ad9371_rx_xcvr {ID} {1}
set_instance_parameter_value avl_ad9371_rx_xcvr {TX_OR_RX_N} {0}
set_instance_parameter_value avl_ad9371_rx_xcvr {PCS_CONFIG} {JESD_PCS_CFG2}
set_instance_parameter_value avl_ad9371_rx_xcvr {LANE_RATE} {4915.2}
set_instance_parameter_value avl_ad9371_rx_xcvr {PLLCLK_FREQUENCY} {2457.6}
set_instance_parameter_value avl_ad9371_rx_xcvr {REFCLK_FREQUENCY} {122.88}
set_instance_parameter_value avl_ad9371_rx_xcvr {CORECLK_FREQUENCY} {122.88}
set_instance_parameter_value avl_ad9371_rx_xcvr {NUM_OF_LANES} {2}
set_instance_parameter_value avl_ad9371_rx_xcvr {NUM_OF_CONVS} {4}
set_instance_parameter_value avl_ad9371_rx_xcvr {FRM_BCNT} {4}
@ -100,9 +96,7 @@ set_instance_parameter_value avl_ad9371_rx_os_xcvr {ID} {1}
set_instance_parameter_value avl_ad9371_rx_os_xcvr {TX_OR_RX_N} {0}
set_instance_parameter_value avl_ad9371_rx_os_xcvr {PCS_CONFIG} {JESD_PCS_CFG2}
set_instance_parameter_value avl_ad9371_rx_os_xcvr {LANE_RATE} {4915.2}
set_instance_parameter_value avl_ad9371_rx_os_xcvr {PLLCLK_FREQUENCY} {2457.6}
set_instance_parameter_value avl_ad9371_rx_os_xcvr {REFCLK_FREQUENCY} {122.88}
set_instance_parameter_value avl_ad9371_rx_os_xcvr {CORECLK_FREQUENCY} {122.88}
set_instance_parameter_value avl_ad9371_rx_os_xcvr {NUM_OF_LANES} {2}
set_instance_parameter_value avl_ad9371_rx_os_xcvr {NUM_OF_CONVS} {2}
set_instance_parameter_value avl_ad9371_rx_os_xcvr {FRM_BCNT} {2}

4
projects/daq2/common/daq2_qsys.tcl
View File

@ -6,9 +6,7 @@ set_instance_parameter_value avl_ad9144_xcvr {ID} {0}
set_instance_parameter_value avl_ad9144_xcvr {TX_OR_RX_N} {1}
set_instance_parameter_value avl_ad9144_xcvr {PCS_CONFIG} {JESD_PCS_CFG2}
set_instance_parameter_value avl_ad9144_xcvr {LANE_RATE} {10000.0}
set_instance_parameter_value avl_ad9144_xcvr {PLLCLK_FREQUENCY} {5000.0}
set_instance_parameter_value avl_ad9144_xcvr {REFCLK_FREQUENCY} {500.0}
set_instance_parameter_value avl_ad9144_xcvr {CORECLK_FREQUENCY} {250.0}
set_instance_parameter_value avl_ad9144_xcvr {NUM_OF_LANES} {4}
set_instance_parameter_value avl_ad9144_xcvr {NUM_OF_CONVS} {2}
set_instance_parameter_value avl_ad9144_xcvr {FRM_BCNT} {1}
@ -99,9 +97,7 @@ set_instance_parameter_value avl_ad9680_xcvr {ID} {1}
set_instance_parameter_value avl_ad9680_xcvr {TX_OR_RX_N} {0}
set_instance_parameter_value avl_ad9680_xcvr {PCS_CONFIG} {JESD_PCS_CFG2}
set_instance_parameter_value avl_ad9680_xcvr {LANE_RATE} {10000.0}
set_instance_parameter_value avl_ad9680_xcvr {PLLCLK_FREQUENCY} {5000.0}
set_instance_parameter_value avl_ad9680_xcvr {REFCLK_FREQUENCY} {500.0}
set_instance_parameter_value avl_ad9680_xcvr {CORECLK_FREQUENCY} {250.0}
set_instance_parameter_value avl_ad9680_xcvr {NUM_OF_LANES} {4}
set_instance_parameter_value avl_ad9680_xcvr {NUM_OF_CONVS} {2}
set_instance_parameter_value avl_ad9680_xcvr {FRM_BCNT} {1}

4
projects/daq3/common/daq3_qsys.tcl
View File

@ -6,9 +6,7 @@ set_instance_parameter_value avl_ad9152_xcvr {ID} {0}
set_instance_parameter_value avl_ad9152_xcvr {TX_OR_RX_N} {1}
set_instance_parameter_value avl_ad9152_xcvr {PCS_CONFIG} {JESD_PCS_CFG2}
set_instance_parameter_value avl_ad9152_xcvr {LANE_RATE} {12500.0}
set_instance_parameter_value avl_ad9152_xcvr {PLLCLK_FREQUENCY} {6250.0}
set_instance_parameter_value avl_ad9152_xcvr {REFCLK_FREQUENCY} {625.0}
set_instance_parameter_value avl_ad9152_xcvr {CORECLK_FREQUENCY} {312.5}
set_instance_parameter_value avl_ad9152_xcvr {NUM_OF_LANES} {4}
set_instance_parameter_value avl_ad9152_xcvr {NUM_OF_CONVS} {2}
set_instance_parameter_value avl_ad9152_xcvr {FRM_BCNT} {1}
@ -98,9 +96,7 @@ set_instance_parameter_value avl_ad9680_xcvr {ID} {1}
set_instance_parameter_value avl_ad9680_xcvr {TX_OR_RX_N} {0}
set_instance_parameter_value avl_ad9680_xcvr {PCS_CONFIG} {JESD_PCS_CFG2}
set_instance_parameter_value avl_ad9680_xcvr {LANE_RATE} {12500.0}
set_instance_parameter_value avl_ad9680_xcvr {PLLCLK_FREQUENCY} {6250.0}
set_instance_parameter_value avl_ad9680_xcvr {REFCLK_FREQUENCY} {625.0}
set_instance_parameter_value avl_ad9680_xcvr {CORECLK_FREQUENCY} {312.5}
set_instance_parameter_value avl_ad9680_xcvr {NUM_OF_LANES} {4}
set_instance_parameter_value avl_ad9680_xcvr {NUM_OF_CONVS} {2}
set_instance_parameter_value avl_ad9680_xcvr {FRM_BCNT} {1}

2
projects/fmcjesdadc1/common/fmcjesdadc1_qsys.tcl
View File

@ -6,9 +6,7 @@ set_instance_parameter_value avl_ad9250_xcvr {ID} {0}
set_instance_parameter_value avl_ad9250_xcvr {TX_OR_RX_N} {0}
set_instance_parameter_value avl_ad9250_xcvr {PCS_CONFIG} {JESD_PCS_CFG2}
set_instance_parameter_value avl_ad9250_xcvr {LANE_RATE} {5000.0}
set_instance_parameter_value avl_ad9250_xcvr {PLLCLK_FREQUENCY} {2500.0}
set_instance_parameter_value avl_ad9250_xcvr {REFCLK_FREQUENCY} {250.0}
set_instance_parameter_value avl_ad9250_xcvr {CORECLK_FREQUENCY} {125.0}
set_instance_parameter_value avl_ad9250_xcvr {NUM_OF_LANES} {4}
set_instance_parameter_value avl_ad9250_xcvr {NUM_OF_CONVS} {4}
set_instance_parameter_value avl_ad9250_xcvr {FRM_BCNT} {4}

2
projects/usdrx1/common/usdrx1_qsys.tcl
View File

@ -6,9 +6,7 @@ set_instance_parameter_value avl_usdrx1_xcvr {ID} {0}
set_instance_parameter_value avl_usdrx1_xcvr {TX_OR_RX_N} {0}
set_instance_parameter_value avl_usdrx1_xcvr {PCS_CONFIG} {JESD_PCS_CFG2}
set_instance_parameter_value avl_usdrx1_xcvr {LANE_RATE} {3200.0}
set_instance_parameter_value avl_usdrx1_xcvr {PLLCLK_FREQUENCY} {1600.0}
set_instance_parameter_value avl_usdrx1_xcvr {REFCLK_FREQUENCY} {80.0}
set_instance_parameter_value avl_usdrx1_xcvr {CORECLK_FREQUENCY} {80.0}
set_instance_parameter_value avl_usdrx1_xcvr {NUM_OF_LANES} {8}
set_instance_parameter_value avl_usdrx1_xcvr {NUM_OF_CONVS} {32}
set_instance_parameter_value avl_usdrx1_xcvr {FRM_BCNT} {4}