ad9625_fmc: add dma fifo for non-zynq
Rejeesh Kutty
parent
89964be59e
commit
f0927afd0b
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@ -278,6 +278,7 @@ if {$sys_zynq == 1} {
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# ila
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set ila_jesd_rx_mon [create_bd_cell -type ip -vlnv xilinx.com:ip:ila:4.0 ila_jesd_rx_mon]
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set_property -dict [list CONFIG.C_MONITOR_TYPE {Native}] $ila_jesd_rx_mon
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set_property -dict [list CONFIG.C_NUM_OF_PROBES {4}] $ila_jesd_rx_mon
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set_property -dict [list CONFIG.C_PROBE0_WIDTH {662}] $ila_jesd_rx_mon
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set_property -dict [list CONFIG.C_PROBE1_WIDTH {10}] $ila_jesd_rx_mon
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@ -1,4 +1,52 @@
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source $ad_hdl_dir/projects/common/vc707/vc707_system_bd.tcl
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source $ad_hdl_dir/projects/common/xilinx/sys_dmafifo.tcl
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source ../common/ad9625_fmc_bd.tcl
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set_property -dict [list CONFIG.C_DMA_DATA_WIDTH_SRC {64}] $axi_ad9625_dma
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set_property -dict [list CONFIG.C_DMA_DATA_WIDTH_DEST {64}] $axi_ad9625_dma
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p_sys_dmafifo [current_bd_instance .] sys_dmafifo 256
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delete_bd_objs [get_bd_nets axi_ad9625_adc_clk]
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delete_bd_objs [get_bd_nets axi_ad9625_adc_enable]
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delete_bd_objs [get_bd_nets axi_ad9625_adc_data]
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delete_bd_objs [get_bd_nets axi_ad9625_adc_dovf]
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delete_bd_objs [get_bd_nets axi_ad9625_adc_valid]
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connect_bd_net -net sys_200m_clk [get_bd_pins sys_dmafifo/axi_clk] $sys_200m_clk_source
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connect_bd_net -net sys_200m_clk [get_bd_pins sys_dmafifo/dma_clk] $sys_200m_clk_source
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connect_bd_net -net sys_200m_clk [get_bd_pins axi_ad9625_dma/fifo_wr_clk] $sys_200m_clk_source
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connect_bd_net -net [get_bd_nets axi_ad9625_gt_rx_rst] [get_bd_pins sys_dmafifo/adc_rst] [get_bd_pins axi_ad9625_gt/rx_rst]
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connect_bd_net -net [get_bd_nets sys_200m_resetn] [get_bd_pins sys_dmafifo/dma_rstn] $sys_200m_resetn_source
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connect_bd_net -net axi_ad9625_dma_xfer_req [get_bd_pins axi_ad9625_dma/fifo_wr_xfer_req] [get_bd_pins sys_dmafifo/axi_xfer_req]
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connect_bd_net -net axi_ad9625_adc_clk [get_bd_pins axi_ad9625_core/adc_clk] [get_bd_pins sys_dmafifo/adc_clk]
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connect_bd_net -net axi_ad9625_adc_enable [get_bd_pins axi_ad9625_core/adc_enable] [get_bd_pins sys_dmafifo/adc_wr]
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connect_bd_net -net axi_ad9625_adc_data [get_bd_pins axi_ad9625_core/adc_data] [get_bd_pins sys_dmafifo/adc_wdata]
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connect_bd_net -net axi_ad9625_adc_dovf [get_bd_pins axi_ad9625_core/adc_dovf] [get_bd_pins sys_dmafifo/adc_wovf]
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connect_bd_net -net axi_ad9625_dma_dwr [get_bd_pins sys_dmafifo/dma_wr] [get_bd_pins axi_ad9625_dma/fifo_wr_en]
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connect_bd_net -net axi_ad9625_dma_ddata [get_bd_pins sys_dmafifo/dma_wdata] [get_bd_pins axi_ad9625_dma/fifo_wr_din]
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connect_bd_net -net axi_ad9625_dma_dovf [get_bd_pins sys_dmafifo/dma_wovf] [get_bd_pins axi_ad9625_dma/fifo_wr_overflow]
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connect_bd_net -net axi_ad9625_adc_valid [get_bd_pins axi_ad9625_core/adc_valid] [get_bd_pins axi_ad9625_dma/fifo_wr_sync]
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connect_bd_net -net axi_ad9625_adc_data [get_bd_pins ila_jesd_rx_mon/PROBE3]
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set ila_dma_mon [create_bd_cell -type ip -vlnv xilinx.com:ip:ila:4.0 ila_dma_mon]
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set_property -dict [list CONFIG.C_MONITOR_TYPE {Native}] $ila_dma_mon
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set_property -dict [list CONFIG.C_NUM_OF_PROBES {4}] $ila_dma_mon
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set_property -dict [list CONFIG.C_PROBE0_WIDTH {1}] $ila_dma_mon
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set_property -dict [list CONFIG.C_PROBE1_WIDTH {1}] $ila_dma_mon
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set_property -dict [list CONFIG.C_PROBE2_WIDTH {64}] $ila_dma_mon
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set_property -dict [list CONFIG.C_PROBE3_WIDTH {5}] $ila_dma_mon
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connect_bd_net -net sys_200m_clk [get_bd_pins ila_dma_mon/clk]
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connect_bd_net -net axi_ad9625_dma_dwr [get_bd_pins ila_dma_mon/probe0]
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connect_bd_net -net axi_ad9625_dma_xfer_req [get_bd_pins ila_dma_mon/probe1]
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connect_bd_net -net axi_ad9625_dma_ddata [get_bd_pins ila_dma_mon/probe2]
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connect_bd_net -net axi_xfer_status [get_bd_pins ila_dma_mon/probe3] [get_bd_pins sys_dmafifo/axi_xfer_status]
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create_bd_addr_seg -range 0x00200000 -offset 0xc0000000 [get_bd_addr_spaces sys_dmafifo/axi_fifo2s/axi] [get_bd_addr_segs sys_dmafifo/axi_bram_ctl/S_AXI/Mem0] SEG_axi_bram_ctl_mem
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@ -0,0 +1,135 @@
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# sys bram (use only when dma is not capable of keeping up).
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# generic fifo interface - existence is oblivious to software.
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proc p_sys_dmafifo {p_name m_name m_width} {
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global ad_hdl_dir
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set p_instance [get_bd_cells $p_name]
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set c_instance [current_bd_instance .]
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current_bd_instance $p_instance
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set m_instance [create_bd_cell -type hier $m_name]
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current_bd_instance $m_instance
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create_bd_pin -dir I -type clk axi_clk
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create_bd_pin -dir I axi_xfer_req
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create_bd_pin -dir O -from 4 -to 0 axi_xfer_status
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create_bd_pin -dir I adc_rst
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create_bd_pin -dir I -type clk adc_clk
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create_bd_pin -dir I adc_wr
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create_bd_pin -dir O adc_wovf
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create_bd_pin -dir I -from [expr ($m_width-1)] -to 0 adc_wdata
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create_bd_pin -dir I dma_rstn
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create_bd_pin -dir I -type clk dma_clk
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create_bd_pin -dir O dma_wr
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create_bd_pin -dir I dma_wovf
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create_bd_pin -dir O -from 63 -to 0 dma_wdata
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set wfifo_ctl [create_bd_cell -type ip -vlnv analog.com:user:util_wfifo:1.0 wfifo_ctl]
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set_property -dict [list CONFIG.M_DATA_WIDTH $m_width] $wfifo_ctl
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set_property -dict [list CONFIG.S_DATA_WIDTH {512}] $wfifo_ctl
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set rfifo_ctl [create_bd_cell -type ip -vlnv analog.com:user:util_wfifo:1.0 rfifo_ctl]
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set_property -dict [list CONFIG.M_DATA_WIDTH {512}] $rfifo_ctl
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set_property -dict [list CONFIG.S_DATA_WIDTH {64}] $rfifo_ctl
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set wfifo_mem [create_bd_cell -type ip -vlnv xilinx.com:ip:fifo_generator:12.0 wfifo_mem]
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set_property -dict [list CONFIG.INTERFACE_TYPE {Native}] $wfifo_mem
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set_property -dict [list CONFIG.Fifo_Implementation {Independent_Clocks_Block_RAM}] $wfifo_mem
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set_property -dict [list CONFIG.Input_Data_Width $m_width] $wfifo_mem
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set_property -dict [list CONFIG.Input_Depth {64}] $wfifo_mem
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set_property -dict [list CONFIG.Output_Data_Width {512}] $wfifo_mem
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set_property -dict [list CONFIG.Overflow_Flag {true}] $wfifo_mem
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set rfifo_mem [create_bd_cell -type ip -vlnv xilinx.com:ip:fifo_generator:12.0 rfifo_mem]
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set_property -dict [list CONFIG.INTERFACE_TYPE {Native}] $rfifo_mem
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set_property -dict [list CONFIG.Fifo_Implementation {Independent_Clocks_Block_RAM}] $rfifo_mem
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set_property -dict [list CONFIG.Input_Data_Width {512}] $rfifo_mem
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set_property -dict [list CONFIG.Input_Depth {64}] $rfifo_mem
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set_property -dict [list CONFIG.Output_Data_Width {64}] $rfifo_mem
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set_property -dict [list CONFIG.Overflow_Flag {true}] $rfifo_mem
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set_property -dict [list CONFIG.Programmable_Full_Type {Multiple_Programmable_Full_Threshold_Constants}] $rfifo_mem
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set_property -dict [list CONFIG.Full_Threshold_Assert_Value {24}] $rfifo_mem
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set_property -dict [list CONFIG.Full_Threshold_Negate_Value {12}] $rfifo_mem
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set axi_fifo2s [create_bd_cell -type ip -vlnv analog.com:user:axi_fifo2s:1.0 axi_fifo2s]
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set_property -dict [list CONFIG.AXI_ADDRESS {0xc0000000}] $axi_fifo2s
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set_property -dict [list CONFIG.AXI_ADDRLIMIT {0xc01fff00}] $axi_fifo2s
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set_property -dict [list CONFIG.AXI_LENGTH {4}] $axi_fifo2s
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set_property -dict [list CONFIG.AXI_SIZE {6}] $axi_fifo2s
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set_property -dict [list CONFIG.DATA_WIDTH {512}] $axi_fifo2s
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set axi_bram_ctl [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_bram_ctrl:4.0 axi_bram_ctl]
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set_property -dict [list CONFIG.DATA_WIDTH {512}] $axi_bram_ctl
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set_property -dict [list CONFIG.SINGLE_PORT_BRAM {0}] $axi_bram_ctl
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set bram_mem [create_bd_cell -type ip -vlnv xilinx.com:ip:blk_mem_gen:8.2 bram_mem]
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set_property -dict [list CONFIG.use_bram_block {BRAM_Controller}] $bram_mem
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set_property -dict [list CONFIG.Memory_Type {True_Dual_Port_RAM}] $bram_mem
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connect_bd_intf_net -intf_net axi_bram [get_bd_intf_pins axi_bram_ctl/S_AXI] [get_bd_intf_pins axi_fifo2s/axi]
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connect_bd_intf_net -intf_net bram_port_a [get_bd_intf_pins axi_bram_ctl/BRAM_PORTA] [get_bd_intf_pins bram_mem/BRAM_PORTA]
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connect_bd_intf_net -intf_net bram_port_b [get_bd_intf_pins axi_bram_ctl/BRAM_PORTB] [get_bd_intf_pins bram_mem/BRAM_PORTB]
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connect_bd_net -net adc_rst [get_bd_pins adc_rst]
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connect_bd_net -net adc_rst [get_bd_pins axi_fifo2s/m_rst]
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connect_bd_net -net adc_clk [get_bd_pins adc_clk]
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connect_bd_net -net axi_clk [get_bd_pins axi_clk]
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connect_bd_net -net dma_clk [get_bd_pins dma_clk]
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connect_bd_net -net adc_clk [get_bd_pins wfifo_ctl/m_clk]
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connect_bd_net -net adc_clk [get_bd_pins wfifo_mem/wr_clk]
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connect_bd_net -net axi_clk [get_bd_pins axi_bram_ctl/s_axi_aclk]
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connect_bd_net -net axi_clk [get_bd_pins axi_fifo2s/axi_clk]
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connect_bd_net -net axi_clk [get_bd_pins axi_fifo2s/m_clk]
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connect_bd_net -net axi_clk [get_bd_pins wfifo_ctl/s_clk]
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connect_bd_net -net axi_clk [get_bd_pins wfifo_mem/rd_clk]
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connect_bd_net -net axi_clk [get_bd_pins rfifo_ctl/m_clk]
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connect_bd_net -net axi_clk [get_bd_pins rfifo_mem/wr_clk]
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connect_bd_net -net dma_rstn [get_bd_pins dma_rstn]
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connect_bd_net -net dma_rstn [get_bd_pins axi_bram_ctl/s_axi_aresetn]
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connect_bd_net -net dma_rstn [get_bd_pins axi_fifo2s/axi_resetn]
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connect_bd_net -net dma_rstn [get_bd_pins wfifo_ctl/rstn]
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connect_bd_net -net dma_clk [get_bd_pins rfifo_ctl/s_clk]
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connect_bd_net -net dma_clk [get_bd_pins rfifo_mem/rd_clk]
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connect_bd_net -net adc_wr [get_bd_pins adc_wr] [get_bd_pins wfifo_ctl/m_wr]
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connect_bd_net -net adc_wdata [get_bd_pins adc_wdata] [get_bd_pins wfifo_ctl/m_wdata]
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connect_bd_net -net adc_wovf [get_bd_pins adc_wovf] [get_bd_pins wfifo_ctl/m_wovf]
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connect_bd_net -net axi_xfer_req [get_bd_pins axi_xfer_req] [get_bd_pins axi_fifo2s/axi_xfer_req]
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connect_bd_net -net axi_xfer_status [get_bd_pins axi_xfer_status] [get_bd_pins axi_fifo2s/axi_xfer_status]
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connect_bd_net -net wfifo_ctl_fifo_rst [get_bd_pins wfifo_ctl/fifo_rst] [get_bd_pins wfifo_mem/rst]
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connect_bd_net -net wfifo_ctl_fifo_wr [get_bd_pins wfifo_ctl/fifo_wr] [get_bd_pins wfifo_mem/wr_en]
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connect_bd_net -net wfifo_ctl_fifo_wdata [get_bd_pins wfifo_ctl/fifo_wdata] [get_bd_pins wfifo_mem/din]
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connect_bd_net -net wfifo_ctl_fifo_wfull [get_bd_pins wfifo_ctl/fifo_wfull] [get_bd_pins wfifo_mem/full]
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connect_bd_net -net wfifo_ctl_fifo_wovf [get_bd_pins wfifo_ctl/fifo_wovf] [get_bd_pins wfifo_mem/overflow]
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connect_bd_net -net dma_wr [get_bd_pins dma_wr] [get_bd_pins rfifo_ctl/s_wr]
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connect_bd_net -net dma_wdata [get_bd_pins dma_wdata] [get_bd_pins rfifo_ctl/s_wdata]
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connect_bd_net -net dma_wovf [get_bd_pins dma_wovf] [get_bd_pins rfifo_ctl/s_wovf]
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connect_bd_net -net rfifo_ctl_fifo_rd [get_bd_pins rfifo_ctl/fifo_rd] [get_bd_pins rfifo_mem/rd_en]
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connect_bd_net -net rfifo_ctl_fifo_rdata [get_bd_pins rfifo_ctl/fifo_rdata] [get_bd_pins rfifo_mem/dout]
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connect_bd_net -net rfifo_ctl_fifo_rempty [get_bd_pins rfifo_ctl/fifo_rempty] [get_bd_pins rfifo_mem/empty]
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connect_bd_net -net wfifo_ctl_fifo_rd [get_bd_pins wfifo_ctl/fifo_rd] [get_bd_pins wfifo_mem/rd_en]
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connect_bd_net -net wfifo_ctl_fifo_rdata [get_bd_pins wfifo_ctl/fifo_rdata] [get_bd_pins wfifo_mem/dout]
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connect_bd_net -net wfifo_ctl_fifo_rempty [get_bd_pins wfifo_ctl/fifo_rempty] [get_bd_pins wfifo_mem/empty]
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connect_bd_net -net rfifo_ctl_fifo_rst [get_bd_pins rfifo_ctl/fifo_rst] [get_bd_pins rfifo_mem/rst]
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connect_bd_net -net rfifo_ctl_fifo_wr [get_bd_pins rfifo_ctl/fifo_wr] [get_bd_pins rfifo_mem/wr_en]
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connect_bd_net -net rfifo_ctl_fifo_wdata [get_bd_pins rfifo_ctl/fifo_wdata] [get_bd_pins rfifo_mem/din]
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connect_bd_net -net rfifo_ctl_fifo_wfull [get_bd_pins rfifo_ctl/fifo_wfull] [get_bd_pins rfifo_mem/full]
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connect_bd_net -net rfifo_ctl_fifo_wovf [get_bd_pins rfifo_ctl/fifo_wovf] [get_bd_pins rfifo_mem/overflow]
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connect_bd_net -net axi_fifo2s_swr [get_bd_pins axi_fifo2s/m_wr] [get_bd_pins wfifo_ctl/s_wr]
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connect_bd_net -net axi_fifo2s_swdata [get_bd_pins axi_fifo2s/m_wdata] [get_bd_pins wfifo_ctl/s_wdata]
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connect_bd_net -net axi_fifo2s_swovf [get_bd_pins axi_fifo2s/m_wovf] [get_bd_pins wfifo_ctl/s_wovf]
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connect_bd_net -net axi_fifo2s_axi_mrst [get_bd_pins axi_fifo2s/axi_mrstn] [get_bd_pins rfifo_ctl/rstn]
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connect_bd_net -net axi_fifo2s_axi_mwr [get_bd_pins axi_fifo2s/axi_mwr] [get_bd_pins rfifo_ctl/m_wr]
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connect_bd_net -net axi_fifo2s_axi_mwdata [get_bd_pins axi_fifo2s/axi_mwdata] [get_bd_pins rfifo_ctl/m_wdata]
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connect_bd_net -net axi_fifo2s_axi_mwovf [get_bd_pins axi_fifo2s/axi_mwovf] [get_bd_pins rfifo_ctl/m_wovf]
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connect_bd_net -net axi_fifo2s_axi_mwpfull [get_bd_pins axi_fifo2s/axi_mwpfull] [get_bd_pins rfifo_mem/prog_full]
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current_bd_instance $c_instance
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}
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