daq2/a10gx- qsys updates
Rejeesh Kutty
parent
4927ca85c2
commit
f1c30ac225
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@ -21,7 +21,7 @@
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{
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datum _sortIndex
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{
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value = "17";
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value = "19";
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type = "int";
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}
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}
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@ -37,7 +37,7 @@
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{
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datum _sortIndex
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{
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value = "15";
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value = "17";
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type = "int";
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}
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datum sopceditor_expanded
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@ -83,6 +83,14 @@
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type = "boolean";
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}
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}
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element axi_ad9680_dma.if_fifo_wr_sync
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{
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datum _tags
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{
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value = "";
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type = "String";
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}
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}
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element axi_ad9680_dma.s_axi
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{
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datum baseAddress
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@ -401,7 +409,7 @@
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{
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datum _sortIndex
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{
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value = "18";
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value = "20";
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type = "int";
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}
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}
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@ -417,7 +425,7 @@
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{
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datum _sortIndex
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{
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value = "19";
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value = "21";
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type = "int";
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}
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}
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@ -425,7 +433,7 @@
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{
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datum _sortIndex
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{
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value = "20";
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value = "22";
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type = "int";
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}
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}
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@ -433,7 +441,7 @@
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{
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datum _sortIndex
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{
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value = "21";
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value = "23";
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type = "int";
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}
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}
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@ -441,7 +449,7 @@
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{
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datum _sortIndex
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{
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value = "22";
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value = "24";
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type = "int";
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}
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}
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@ -449,7 +457,7 @@
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{
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datum _sortIndex
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{
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value = "23";
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value = "25";
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type = "int";
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}
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}
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@ -457,7 +465,7 @@
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{
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datum _sortIndex
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{
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value = "24";
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value = "26";
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type = "int";
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}
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}
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@ -469,6 +477,94 @@
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type = "String";
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}
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}
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element system_bd
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{
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datum _originalDeviceFamily
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{
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value = "Arria 10";
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type = "String";
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}
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}
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element system_bd
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{
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datum _originalDeviceFamily
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{
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value = "Arria 10";
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type = "String";
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}
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}
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element system_bd
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{
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datum _originalDeviceFamily
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{
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value = "Arria 10";
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type = "String";
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}
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}
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element system_bd
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{
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datum _originalDeviceFamily
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{
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value = "Arria 10";
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type = "String";
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}
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}
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element system_bd
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{
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datum _originalDeviceFamily
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{
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value = "Arria 10";
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type = "String";
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}
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}
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element system_bd
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{
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datum _originalDeviceFamily
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{
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value = "Arria 10";
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type = "String";
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}
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}
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element system_bd
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{
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datum _originalDeviceFamily
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{
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value = "Arria 10";
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type = "String";
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}
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}
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element util_cpack_0
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{
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datum _sortIndex
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{
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value = "15";
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type = "int";
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}
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}
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element util_cpack_0.if_adc_rst
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{
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datum _tags
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{
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value = "";
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type = "String";
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}
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}
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element util_cpack_0.if_adc_sync
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{
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datum _tags
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{
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value = "";
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type = "String";
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}
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}
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element util_upack_0
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{
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datum _sortIndex
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{
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value = "18";
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type = "int";
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}
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}
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}
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]]></parameter>
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<parameter name="clockCrossingAdapter" value="FIFO" />
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@ -558,16 +654,6 @@
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type="reset"
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dir="end" />
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<interface name="sys_spi" internal="sys_spi.external" type="conduit" dir="end" />
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<interface
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name="sys_xcvr_rx_data"
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internal="sys_xcvr.jesd204_rx_link"
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type="avalon_streaming"
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dir="start" />
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<interface
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name="sys_xcvr_rx_ferr"
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internal="sys_xcvr.jesd204_rx_frame_error"
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type="conduit"
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dir="end" />
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<interface
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name="sys_xcvr_rx_ref_clk"
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internal="sys_xcvr_rx_ref_clk.clk_in"
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@ -593,11 +679,6 @@
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internal="sys_xcvr.rx_serial_data"
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type="conduit"
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dir="end" />
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<interface
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name="sys_xcvr_tx_data"
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internal="sys_xcvr.jesd204_tx_link"
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type="avalon_streaming"
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dir="end" />
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<interface
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name="sys_xcvr_tx_ref_clk"
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internal="sys_xcvr_tx_ref_clk.clk_in"
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@ -630,8 +711,8 @@
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<parameter name="C_CLKS_ASYNC_REQ_SRC" value="1" />
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<parameter name="C_CLKS_ASYNC_SRC_DEST" value="1" />
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<parameter name="C_CYCLIC" value="1" />
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<parameter name="C_DMA_DATA_WIDTH_DEST" value="64" />
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<parameter name="C_DMA_DATA_WIDTH_SRC" value="64" />
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<parameter name="C_DMA_DATA_WIDTH_DEST" value="128" />
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<parameter name="C_DMA_DATA_WIDTH_SRC" value="128" />
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<parameter name="C_DMA_LENGTH_WIDTH" value="14" />
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<parameter name="C_DMA_TYPE_DEST" value="2" />
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<parameter name="C_DMA_TYPE_SRC" value="0" />
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@ -649,8 +730,8 @@
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<parameter name="C_CLKS_ASYNC_REQ_SRC" value="1" />
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<parameter name="C_CLKS_ASYNC_SRC_DEST" value="1" />
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<parameter name="C_CYCLIC" value="1" />
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<parameter name="C_DMA_DATA_WIDTH_DEST" value="64" />
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<parameter name="C_DMA_DATA_WIDTH_SRC" value="64" />
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<parameter name="C_DMA_DATA_WIDTH_DEST" value="128" />
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<parameter name="C_DMA_DATA_WIDTH_SRC" value="128" />
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<parameter name="C_DMA_LENGTH_WIDTH" value="14" />
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<parameter name="C_DMA_TYPE_DEST" value="0" />
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<parameter name="C_DMA_TYPE_SRC" value="2" />
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@ -1601,7 +1682,7 @@
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<parameter name="AUTO_MM_READ_ADDRESS_MAP" value="" />
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<parameter name="AUTO_MM_READ_ADDRESS_WIDTH" value="" />
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<parameter name="AUTO_MM_WRITE_ADDRESS_MAP"><![CDATA[<address-map><slave name='sys_ddr3_cntrl.ctrl_amm_avalon_slave_0' start='0x0' end='0x80000000' /></address-map>]]></parameter>
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<parameter name="AUTO_MM_WRITE_ADDRESS_WIDTH">com.altera.entityinterfaces.moduleext.AddressWidthType@6a917257</parameter>
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<parameter name="AUTO_MM_WRITE_ADDRESS_WIDTH">com.altera.entityinterfaces.moduleext.AddressWidthType@1652bcab</parameter>
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<parameter name="BURST_ENABLE" value="1" />
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<parameter name="BURST_WRAPPING_SUPPORT" value="0" />
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<parameter name="CHANNEL_ENABLE" value="0" />
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@ -1631,7 +1712,7 @@
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<parameter name="AUTO_DEVICE_FAMILY" value="Arria 10" />
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<parameter name="AUTO_DEVICE_SPEEDGRADE" value="2" />
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<parameter name="AUTO_MM_READ_ADDRESS_MAP"><![CDATA[<address-map><slave name='sys_ddr3_cntrl.ctrl_amm_avalon_slave_0' start='0x0' end='0x80000000' /></address-map>]]></parameter>
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<parameter name="AUTO_MM_READ_ADDRESS_WIDTH">com.altera.entityinterfaces.moduleext.AddressWidthType@1f3a4f34</parameter>
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<parameter name="AUTO_MM_READ_ADDRESS_WIDTH">com.altera.entityinterfaces.moduleext.AddressWidthType@4c922d0e</parameter>
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<parameter name="AUTO_MM_WRITE_ADDRESS_MAP" value="" />
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<parameter name="AUTO_MM_WRITE_ADDRESS_WIDTH" value="" />
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<parameter name="BURST_ENABLE" value="1" />
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@ -2535,6 +2616,14 @@
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<parameter name="inputClockFrequency" value="0" />
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<parameter name="resetSynchronousEdges" value="NONE" />
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</module>
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<module name="util_cpack_0" kind="util_cpack" version="1.0" enabled="1">
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<parameter name="CH_CNT" value="2" />
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<parameter name="CH_DW" value="64" />
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</module>
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<module name="util_upack_0" kind="util_upack" version="1.0" enabled="1">
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<parameter name="CH_CNT" value="2" />
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<parameter name="CH_DW" value="64" />
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</module>
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<connection
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kind="avalon"
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version="15.0"
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@ -2787,6 +2876,16 @@
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<parameter name="baseAddress" value="0x80228000" />
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<parameter name="defaultConnection" value="false" />
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</connection>
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<connection
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kind="avalon_streaming"
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version="15.0"
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start="axi_ad9144_core.if_tx_data"
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end="sys_xcvr.jesd204_tx_link" />
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<connection
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kind="avalon_streaming"
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version="15.0"
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start="sys_xcvr.jesd204_rx_link"
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end="axi_ad9680_core.if_rx_data" />
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<connection
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kind="avalon_streaming"
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version="15.0"
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@ -2797,11 +2896,6 @@
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version="15.0"
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start="sys_ethernet_dma_tx.st_source"
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end="sys_ethernet.transmit" />
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<connection
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kind="clock"
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version="15.0"
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start="axi_ad9680_core.adc_clock"
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end="axi_ad9680_dma.fifo_wr_clock" />
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<connection kind="clock" version="15.0" start="sys_clk.clk" end="sys_cpu.clk" />
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<connection kind="clock" version="15.0" start="sys_clk.clk" end="sys_uart.clk" />
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<connection kind="clock" version="15.0" start="sys_clk.clk" end="sys_timer.clk" />
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@ -2909,11 +3003,6 @@
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version="15.0"
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start="sys_clk.clk"
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end="sys_ethernet.transmit_clock_connection" />
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<connection
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kind="clock"
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version="15.0"
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start="axi_ad9144_core.dac_clock"
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end="axi_ad9144_dma.fifo_rd_clock" />
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<connection
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kind="clock"
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version="15.0"
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@ -2924,6 +3013,36 @@
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version="15.0"
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start="sys_ddr3_cntrl.emif_usr_clk_clock_source"
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end="axi_ad9144_dma.m_src_axi_clock" />
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<connection
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kind="clock"
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version="15.0"
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start="sys_xcvr_rx_clk.outclk0"
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end="util_cpack_0.if_adc_clk" />
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<connection
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kind="clock"
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version="15.0"
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start="sys_xcvr_tx_clk.outclk0"
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end="util_upack_0.if_dac_clk" />
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<connection
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kind="clock"
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version="15.0"
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start="sys_xcvr_tx_clk.outclk0"
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end="axi_ad9144_dma.if_fifo_rd_clk" />
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<connection
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kind="clock"
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version="15.0"
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start="sys_xcvr_rx_clk.outclk0"
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end="axi_ad9680_dma.if_fifo_wr_clock" />
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<connection
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kind="clock"
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version="15.0"
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start="sys_xcvr_rx_clk.outclk0"
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end="axi_ad9680_core.if_rx_clk" />
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<connection
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kind="clock"
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version="15.0"
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start="sys_xcvr_tx_clk.outclk0"
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end="axi_ad9144_core.if_tx_clk" />
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<connection
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kind="clock"
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version="15.0"
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@ -2934,16 +3053,6 @@
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version="15.0"
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start="sys_xcvr_tx_clk.outclk0"
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end="sys_xcvr.txlink_clk" />
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<connection
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kind="clock"
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version="15.0"
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start="sys_xcvr_tx_clk.outclk0"
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end="axi_ad9144_core.xcvr_clk" />
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<connection
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kind="clock"
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version="15.0"
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start="sys_xcvr_rx_clk.outclk0"
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end="axi_ad9680_core.xcvr_clk" />
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<connection
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kind="conduit"
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version="15.0"
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@ -2955,6 +3064,215 @@
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<parameter name="startPortLSB" value="0" />
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<parameter name="width" value="0" />
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</connection>
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<connection
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kind="conduit"
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version="15.0"
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start="axi_ad9680_core.if_adc_data_0"
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end="util_cpack_0.if_adc_data_0">
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<parameter name="endPort" value="" />
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<parameter name="endPortLSB" value="0" />
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<parameter name="startPort" value="" />
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<parameter name="startPortLSB" value="0" />
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<parameter name="width" value="0" />
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</connection>
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<connection
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kind="conduit"
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version="15.0"
|
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start="axi_ad9680_core.if_adc_data_1"
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end="util_cpack_0.if_adc_data_1">
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<parameter name="endPort" value="" />
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<parameter name="endPortLSB" value="0" />
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<parameter name="startPort" value="" />
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<parameter name="startPortLSB" value="0" />
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<parameter name="width" value="0" />
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</connection>
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<connection
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kind="conduit"
|
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version="15.0"
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start="axi_ad9680_core.if_adc_dovf"
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end="axi_ad9680_dma.if_fifo_wr_overflow">
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<parameter name="endPort" value="" />
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<parameter name="endPortLSB" value="0" />
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<parameter name="startPort" value="" />
|
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<parameter name="startPortLSB" value="0" />
|
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<parameter name="width" value="0" />
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</connection>
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<connection
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kind="conduit"
|
||||
version="15.0"
|
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start="util_cpack_0.if_adc_enable_0"
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end="axi_ad9680_core.if_adc_enable_0">
|
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<parameter name="endPort" value="" />
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<parameter name="endPortLSB" value="0" />
|
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<parameter name="startPort" value="" />
|
||||
<parameter name="startPortLSB" value="0" />
|
||||
<parameter name="width" value="0" />
|
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</connection>
|
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<connection
|
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kind="conduit"
|
||||
version="15.0"
|
||||
start="axi_ad9680_core.if_adc_enable_1"
|
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end="util_cpack_0.if_adc_enable_1">
|
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<parameter name="endPort" value="" />
|
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<parameter name="endPortLSB" value="0" />
|
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<parameter name="startPort" value="" />
|
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<parameter name="startPortLSB" value="0" />
|
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<parameter name="width" value="0" />
|
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</connection>
|
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<connection
|
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kind="conduit"
|
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version="15.0"
|
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start="util_cpack_0.if_adc_sync"
|
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end="axi_ad9680_dma.if_fifo_wr_sync">
|
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<parameter name="endPort" value="" />
|
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<parameter name="endPortLSB" value="0" />
|
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<parameter name="startPort" value="" />
|
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<parameter name="startPortLSB" value="0" />
|
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<parameter name="width" value="0" />
|
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</connection>
|
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<connection
|
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kind="conduit"
|
||||
version="15.0"
|
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start="util_cpack_0.if_adc_valid"
|
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end="axi_ad9680_dma.if_fifo_wr_en">
|
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<parameter name="endPort" value="" />
|
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<parameter name="endPortLSB" value="0" />
|
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<parameter name="startPort" value="" />
|
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<parameter name="startPortLSB" value="0" />
|
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<parameter name="width" value="0" />
|
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</connection>
|
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<connection
|
||||
kind="conduit"
|
||||
version="15.0"
|
||||
start="axi_ad9680_core.if_adc_valid_0"
|
||||
end="util_cpack_0.if_adc_valid_0">
|
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<parameter name="endPort" value="" />
|
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<parameter name="endPortLSB" value="0" />
|
||||
<parameter name="startPort" value="" />
|
||||
<parameter name="startPortLSB" value="0" />
|
||||
<parameter name="width" value="0" />
|
||||
</connection>
|
||||
<connection
|
||||
kind="conduit"
|
||||
version="15.0"
|
||||
start="util_cpack_0.if_adc_valid_1"
|
||||
end="axi_ad9680_core.if_adc_valid_1">
|
||||
<parameter name="endPort" value="" />
|
||||
<parameter name="endPortLSB" value="0" />
|
||||
<parameter name="startPort" value="" />
|
||||
<parameter name="startPortLSB" value="0" />
|
||||
<parameter name="width" value="0" />
|
||||
</connection>
|
||||
<connection
|
||||
kind="conduit"
|
||||
version="15.0"
|
||||
start="axi_ad9144_core.if_dac_data_0"
|
||||
end="util_upack_0.if_dac_data_0">
|
||||
<parameter name="endPort" value="" />
|
||||
<parameter name="endPortLSB" value="0" />
|
||||
<parameter name="startPort" value="" />
|
||||
<parameter name="startPortLSB" value="0" />
|
||||
<parameter name="width" value="0" />
|
||||
</connection>
|
||||
<connection
|
||||
kind="conduit"
|
||||
version="15.0"
|
||||
start="axi_ad9144_core.if_dac_data_1"
|
||||
end="util_upack_0.if_dac_data_1">
|
||||
<parameter name="endPort" value="" />
|
||||
<parameter name="endPortLSB" value="0" />
|
||||
<parameter name="startPort" value="" />
|
||||
<parameter name="startPortLSB" value="0" />
|
||||
<parameter name="width" value="0" />
|
||||
</connection>
|
||||
<connection
|
||||
kind="conduit"
|
||||
version="15.0"
|
||||
start="axi_ad9144_core.if_dac_enable_0"
|
||||
end="util_upack_0.if_dac_enable_0">
|
||||
<parameter name="endPort" value="" />
|
||||
<parameter name="endPortLSB" value="0" />
|
||||
<parameter name="startPort" value="" />
|
||||
<parameter name="startPortLSB" value="0" />
|
||||
<parameter name="width" value="0" />
|
||||
</connection>
|
||||
<connection
|
||||
kind="conduit"
|
||||
version="15.0"
|
||||
start="axi_ad9144_core.if_dac_enable_1"
|
||||
end="util_upack_0.if_dac_enable_1">
|
||||
<parameter name="endPort" value="" />
|
||||
<parameter name="endPortLSB" value="0" />
|
||||
<parameter name="startPort" value="" />
|
||||
<parameter name="startPortLSB" value="0" />
|
||||
<parameter name="width" value="0" />
|
||||
</connection>
|
||||
<connection
|
||||
kind="conduit"
|
||||
version="15.0"
|
||||
start="util_upack_0.if_dac_valid"
|
||||
end="axi_ad9144_dma.if_fifo_rd_en">
|
||||
<parameter name="endPort" value="" />
|
||||
<parameter name="endPortLSB" value="0" />
|
||||
<parameter name="startPort" value="" />
|
||||
<parameter name="startPortLSB" value="0" />
|
||||
<parameter name="width" value="0" />
|
||||
</connection>
|
||||
<connection
|
||||
kind="conduit"
|
||||
version="15.0"
|
||||
start="axi_ad9144_core.if_dac_valid_0"
|
||||
end="util_upack_0.if_dac_valid_0">
|
||||
<parameter name="endPort" value="" />
|
||||
<parameter name="endPortLSB" value="0" />
|
||||
<parameter name="startPort" value="" />
|
||||
<parameter name="startPortLSB" value="0" />
|
||||
<parameter name="width" value="0" />
|
||||
</connection>
|
||||
<connection
|
||||
kind="conduit"
|
||||
version="15.0"
|
||||
start="axi_ad9144_core.if_dac_valid_1"
|
||||
end="util_upack_0.if_dac_valid_1">
|
||||
<parameter name="endPort" value="" />
|
||||
<parameter name="endPortLSB" value="0" />
|
||||
<parameter name="startPort" value="" />
|
||||
<parameter name="startPortLSB" value="0" />
|
||||
<parameter name="width" value="0" />
|
||||
</connection>
|
||||
<connection
|
||||
kind="conduit"
|
||||
version="15.0"
|
||||
start="axi_ad9144_dma.if_fifo_rd_dout"
|
||||
end="util_upack_0.if_dac_data">
|
||||
<parameter name="endPort" value="" />
|
||||
<parameter name="endPortLSB" value="0" />
|
||||
<parameter name="startPort" value="" />
|
||||
<parameter name="startPortLSB" value="0" />
|
||||
<parameter name="width" value="0" />
|
||||
</connection>
|
||||
<connection
|
||||
kind="conduit"
|
||||
version="15.0"
|
||||
start="axi_ad9144_dma.if_fifo_rd_underflow"
|
||||
end="axi_ad9144_core.if_dac_dunf">
|
||||
<parameter name="endPort" value="" />
|
||||
<parameter name="endPortLSB" value="0" />
|
||||
<parameter name="startPort" value="" />
|
||||
<parameter name="startPortLSB" value="0" />
|
||||
<parameter name="width" value="0" />
|
||||
</connection>
|
||||
<connection
|
||||
kind="conduit"
|
||||
version="15.0"
|
||||
start="axi_ad9680_dma.if_fifo_wr_din"
|
||||
end="util_cpack_0.if_adc_data">
|
||||
<parameter name="endPort" value="" />
|
||||
<parameter name="endPortLSB" value="0" />
|
||||
<parameter name="startPort" value="" />
|
||||
<parameter name="startPortLSB" value="0" />
|
||||
<parameter name="width" value="0" />
|
||||
</connection>
|
||||
<connection
|
||||
kind="conduit"
|
||||
version="15.0"
|
||||
|
|
|
|||
Loading…
Reference in New Issue