From f34b561e197fcba7db238dc67afc65c3a56fbd39 Mon Sep 17 00:00:00 2001 From: Dan Hotoleanu Date: Wed, 26 Jan 2022 11:34:14 +0000 Subject: [PATCH] daq3: Parameterize JESD204 configuration values Added the capability to set the JESD204 configuration values from a single point in the code and to modify these default settings from the command line for the Xilinx FPGAs in the project. Signed-off-by: Dan Hotoleanu --- projects/daq3/common/daq3_bd.tcl | 33 ++++++++++++++++--------- projects/daq3/kcu105/system_project.tcl | 23 ++++++++++++++++- projects/daq3/vcu118/system_project.tcl | 23 ++++++++++++++++- projects/daq3/zc706/system_project.tcl | 25 ++++++++++++++++--- projects/daq3/zcu102/system_project.tcl | 23 ++++++++++++++++- 5 files changed, 109 insertions(+), 18 deletions(-) diff --git a/projects/daq3/common/daq3_bd.tcl b/projects/daq3/common/daq3_bd.tcl index 24fac4762..a8e099443 100644 --- a/projects/daq3/common/daq3_bd.tcl +++ b/projects/daq3/common/daq3_bd.tcl @@ -1,11 +1,17 @@ +# +# Parameter description: +# [RX/TX]_JESD_M : Number of converters per link +# [RX/TX]_JESD_L : Number of lanes per link +# [RX/TX]_JESD_S : Number of samples per frame +# source $ad_hdl_dir/library/jesd204/scripts/jesd204.tcl # TX parameters -set TX_NUM_OF_LANES 4 ; # L -set TX_NUM_OF_CONVERTERS 2 ; # M -set TX_SAMPLES_PER_FRAME 1 ; # S -set TX_SAMPLE_WIDTH 16 ; # N/NP +set TX_NUM_OF_LANES $ad_project_params(TX_JESD_L) ; # L +set TX_NUM_OF_CONVERTERS $ad_project_params(TX_JESD_M) ; # M +set TX_SAMPLES_PER_FRAME $ad_project_params(TX_JESD_S) ; # S +set TX_SAMPLE_WIDTH 16 ; # N/NP set TX_SAMPLES_PER_CHANNEL [expr $TX_NUM_OF_LANES * 32 / \ ($TX_NUM_OF_CONVERTERS * $TX_SAMPLE_WIDTH)] ; # L * 32 / (M * N) @@ -14,10 +20,10 @@ set dac_fifo_name axi_ad9152_fifo set dac_data_width [expr $TX_SAMPLE_WIDTH * $TX_NUM_OF_CONVERTERS * $TX_SAMPLES_PER_CHANNEL] # RX parameters -set RX_NUM_OF_LANES 4 ; # L -set RX_NUM_OF_CONVERTERS 2 ; # M -set RX_SAMPLES_PER_FRAME 1 ; # S -set RX_SAMPLE_WIDTH 16 ; # N/NP +set RX_NUM_OF_LANES $ad_project_params(RX_JESD_L) ; # L +set RX_NUM_OF_CONVERTERS $ad_project_params(RX_JESD_M) ; # M +set RX_SAMPLES_PER_FRAME $ad_project_params(RX_JESD_S) ; # S +set RX_SAMPLE_WIDTH 16 ; # N/NP set RX_SAMPLES_PER_CHANNEL [expr $RX_NUM_OF_LANES * 32 / \ ($RX_NUM_OF_CONVERTERS * $RX_SAMPLE_WIDTH)] ; # L * 32 / (M * N) @@ -25,6 +31,9 @@ set RX_SAMPLES_PER_CHANNEL [expr $RX_NUM_OF_LANES * 32 / \ set adc_fifo_name axi_ad9680_fifo set adc_data_width [expr $RX_SAMPLE_WIDTH * $RX_NUM_OF_CONVERTERS * $RX_SAMPLES_PER_CHANNEL] +set MAX_TX_NUM_OF_LANES 4 +set MAX_RX_NUM_OF_LANES 4 + # dac peripherals ad_ip_instance axi_adxcvr axi_ad9152_xcvr @@ -99,8 +108,8 @@ if {$sys_zynq == 0 || $sys_zynq == 1} { # shared transceiver core ad_ip_instance util_adxcvr util_daq3_xcvr -ad_ip_parameter util_daq3_xcvr CONFIG.RX_NUM_OF_LANES $RX_NUM_OF_LANES -ad_ip_parameter util_daq3_xcvr CONFIG.TX_NUM_OF_LANES $TX_NUM_OF_LANES +ad_ip_parameter util_daq3_xcvr CONFIG.RX_NUM_OF_LANES $MAX_RX_NUM_OF_LANES +ad_ip_parameter util_daq3_xcvr CONFIG.TX_NUM_OF_LANES $MAX_TX_NUM_OF_LANES ad_ip_parameter util_daq3_xcvr CONFIG.QPLL_REFCLK_DIV 1 ad_ip_parameter util_daq3_xcvr CONFIG.QPLL_FBDIV_RATIO 1 ad_ip_parameter util_daq3_xcvr CONFIG.QPLL_FBDIV 0x30; # 20 @@ -124,7 +133,7 @@ ad_xcvrpll axi_ad9680_xcvr/up_pll_rst util_daq3_xcvr/up_cpll_rst_* # connections (dac) -ad_xcvrcon util_daq3_xcvr axi_ad9152_xcvr axi_ad9152_jesd {0 2 3 1} +ad_xcvrcon util_daq3_xcvr axi_ad9152_xcvr axi_ad9152_jesd {0 2 3 1} {} {} $MAX_TX_NUM_OF_LANES ad_connect util_daq3_xcvr/tx_out_clk_0 axi_ad9152_tpl_core/link_clk ad_connect axi_ad9152_jesd/tx_data axi_ad9152_tpl_core/link ad_connect util_daq3_xcvr/tx_out_clk_0 axi_ad9152_upack/clk @@ -160,7 +169,7 @@ ad_connect axi_ad9152_fifo/dma_xfer_last axi_ad9152_dma/m_axis_last # connections (adc) -ad_xcvrcon util_daq3_xcvr axi_ad9680_xcvr axi_ad9680_jesd +ad_xcvrcon util_daq3_xcvr axi_ad9680_xcvr axi_ad9680_jesd {} {} {} $MAX_RX_NUM_OF_LANES ad_connect util_daq3_xcvr/rx_out_clk_0 axi_ad9680_tpl_core/link_clk ad_connect axi_ad9680_jesd/rx_sof axi_ad9680_tpl_core/link_sof ad_connect axi_ad9680_jesd/rx_data_tdata axi_ad9680_tpl_core/link_data diff --git a/projects/daq3/kcu105/system_project.tcl b/projects/daq3/kcu105/system_project.tcl index 3bf7b9bf0..02ba29abd 100644 --- a/projects/daq3/kcu105/system_project.tcl +++ b/projects/daq3/kcu105/system_project.tcl @@ -3,7 +3,28 @@ source ../../scripts/adi_env.tcl source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl source $ad_hdl_dir/projects/scripts/adi_board.tcl -adi_project daq3_kcu105 +# get_env_param retrieves parameter value from the environment if exists, +# other case use the default value +# +# Use over-writable parameters from the environment. +# +# e.g. +# make RX_JESD_L=4 RX_JESD_M=2 TX_JESD_L=4 TX_JESD_M=2 + +# Parameter description: +# [RX/TX]_JESD_M : Number of converters per link +# [RX/TX]_JESD_L : Number of lanes per link +# [RX/TX]_JESD_S : Number of samples per frame + +adi_project daq3_kcu105 0 [list \ + RX_JESD_M [get_env_param RX_JESD_M 2 ] \ + RX_JESD_L [get_env_param RX_JESD_L 4 ] \ + RX_JESD_S [get_env_param RX_JESD_S 1 ] \ + TX_JESD_M [get_env_param TX_JESD_M 2 ] \ + TX_JESD_L [get_env_param TX_JESD_L 4 ] \ + TX_JESD_S [get_env_param TX_JESD_S 1 ] \ +] + adi_project_files daq3_kcu105 [list \ "../common/daq3_spi.v" \ "system_top.v" \ diff --git a/projects/daq3/vcu118/system_project.tcl b/projects/daq3/vcu118/system_project.tcl index 070ff6c98..169d12476 100644 --- a/projects/daq3/vcu118/system_project.tcl +++ b/projects/daq3/vcu118/system_project.tcl @@ -3,7 +3,28 @@ source ../../scripts/adi_env.tcl source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl source $ad_hdl_dir/projects/scripts/adi_board.tcl -adi_project daq3_vcu118 +# get_env_param retrieves parameter value from the environment if exists, +# other case use the default value +# +# Use over-writable parameters from the environment. +# +# e.g. +# make RX_JESD_L=4 RX_JESD_M=2 TX_JESD_L=4 TX_JESD_M=2 + +# Parameter description: +# [RX/TX]_JESD_M : Number of converters per link +# [RX/TX]_JESD_L : Number of lanes per link +# [RX/TX]_JESD_S : Number of samples per frame + +adi_project daq3_vcu118 0 [list \ + RX_JESD_M [get_env_param RX_JESD_M 2 ] \ + RX_JESD_L [get_env_param RX_JESD_L 4 ] \ + RX_JESD_S [get_env_param RX_JESD_S 1 ] \ + TX_JESD_M [get_env_param TX_JESD_M 2 ] \ + TX_JESD_L [get_env_param TX_JESD_L 4 ] \ + TX_JESD_S [get_env_param TX_JESD_S 1 ] \ +] + adi_project_files daq3_vcu118 [list \ "../common/daq3_spi.v" \ "system_top.v" \ diff --git a/projects/daq3/zc706/system_project.tcl b/projects/daq3/zc706/system_project.tcl index 2d174170b..7bc72602f 100644 --- a/projects/daq3/zc706/system_project.tcl +++ b/projects/daq3/zc706/system_project.tcl @@ -1,11 +1,30 @@ - - source ../../scripts/adi_env.tcl source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl source $ad_hdl_dir/projects/scripts/adi_board.tcl -adi_project daq3_zc706 +# get_env_param retrieves parameter value from the environment if exists, +# other case use the default value +# +# Use over-writable parameters from the environment. +# +# e.g. +# make RX_JESD_L=4 RX_JESD_M=2 TX_JESD_L=4 TX_JESD_M=2 + +# Parameter description: +# [RX/TX]_JESD_M : Number of converters per link +# [RX/TX]_JESD_L : Number of lanes per link +# [RX/TX]_JESD_S : Number of samples per frame + +adi_project daq3_zc706 0 [list \ + RX_JESD_M [get_env_param RX_JESD_M 2 ] \ + RX_JESD_L [get_env_param RX_JESD_L 4 ] \ + RX_JESD_S [get_env_param RX_JESD_S 1 ] \ + TX_JESD_M [get_env_param TX_JESD_M 2 ] \ + TX_JESD_L [get_env_param TX_JESD_L 4 ] \ + TX_JESD_S [get_env_param TX_JESD_S 1 ] \ +] + adi_project_files daq3_zc706 [list \ "../common/daq3_spi.v" \ "system_top.v" \ diff --git a/projects/daq3/zcu102/system_project.tcl b/projects/daq3/zcu102/system_project.tcl index 2fbac7381..791729556 100644 --- a/projects/daq3/zcu102/system_project.tcl +++ b/projects/daq3/zcu102/system_project.tcl @@ -3,7 +3,28 @@ source ../../scripts/adi_env.tcl source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl source $ad_hdl_dir/projects/scripts/adi_board.tcl -adi_project daq3_zcu102 +# get_env_param retrieves parameter value from the environment if exists, +# other case use the default value +# +# Use over-writable parameters from the environment. +# +# e.g. +# make RX_JESD_L=4 RX_JESD_M=2 TX_JESD_L=4 TX_JESD_M=2 + +# Parameter description: +# [RX/TX]_JESD_M : Number of converters per link +# [RX/TX]_JESD_L : Number of lanes per link +# [RX/TX]_JESD_S : Number of samples per frame + +adi_project daq3_zcu102 0 [list \ + RX_JESD_M [get_env_param RX_JESD_M 2 ] \ + RX_JESD_L [get_env_param RX_JESD_L 4 ] \ + RX_JESD_S [get_env_param RX_JESD_S 1 ] \ + TX_JESD_M [get_env_param TX_JESD_M 2 ] \ + TX_JESD_L [get_env_param TX_JESD_L 4 ] \ + TX_JESD_S [get_env_param TX_JESD_S 1 ] \ +] + adi_project_files daq3_zcu102 [list \ "../common/daq3_spi.v" \ "system_top.v" \