ad469x: Use axi_pwm_gen; clean-up

Replace axi_pulse_gen with axi_pmw_gen for softare support
considerations. Remove common/config.tcl and update project scripts
accordingly.
main
Sergiu Arpadi 2022-11-11 14:57:33 +02:00 committed by sarpadi
parent eb663876d7
commit f64830364c
4 changed files with 11 additions and 39 deletions

View File

@ -5,11 +5,11 @@ create_bd_port -dir I ad469x_spi_busy
source $ad_hdl_dir/library/spi_engine/scripts/spi_engine.tcl
set data_width $ad_project_params(DATA_WIDTH)
set async_spi_clk $ad_project_params(ASYNC_SPI_CLK)
set num_cs $ad_project_params(NUM_CS)
set num_sdi $ad_project_params(NUM_SDI)
set sdi_delay $ad_project_params(SDI_DELAY)
set data_width 32
set async_spi_clk 1
set num_cs 1
set num_sdi 1
set sdi_delay 1
set hier_spi_engine spi_ad469x
@ -28,10 +28,10 @@ ad_connect spi_clk spi_clkgen/clk_0
## the acutal sample rate will be PULSE_PERIOD * (1/sys_cpu_clk)
set sampling_cycle [expr int(ceil(double($spi_clk_ref_frequency * 1000000) / $adc_sampling_rate))]
ad_ip_instance axi_pulse_gen ad469x_trigger_gen
ad_ip_instance axi_pwm_gen ad469x_trigger_gen
ad_ip_parameter ad469x_trigger_gen CONFIG.PULSE_PERIOD $sampling_cycle
ad_ip_parameter ad469x_trigger_gen CONFIG.PULSE_WIDTH 1
ad_ip_parameter ad469x_trigger_gen CONFIG.PULSE_0_PERIOD $sampling_cycle
ad_ip_parameter ad469x_trigger_gen CONFIG.PULSE_0_WIDTH 1
ad_connect spi_clk ad469x_trigger_gen/ext_clk
ad_connect $sys_cpu_clk ad469x_trigger_gen/s_axi_aclk
@ -80,7 +80,7 @@ ad_ip_parameter cnv_gate CONFIG.C_SIZE 1
ad_ip_parameter cnv_gate CONFIG.C_OPERATION {and}
ad_connect cnv_gate/Op1 axi_ad469x_dma/s_axis_xfer_req
ad_connect cnv_gate/Op2 ad469x_trigger_gen/pulse
ad_connect cnv_gate/Op2 ad469x_trigger_gen/pwm_0
ad_connect cnv_gate/Res ad469x_spi_cnv
ad_cpu_interconnect 0x44a00000 $hier_spi_engine/axi_regmap

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@ -1,20 +0,0 @@
set device AD469X
set mode 0
set hier_spi_engine spi_ad469x
# Mode DATA_WIDTH ASYNC_SPI_CLK NUM_CSN NUM_SDI SDI_DELAY
set params(AD469X,0) {32 1 1 1 1}
proc get_config_param {param} {
upvar device device
upvar mode mode
upvar params params
set spi_params {DATA_WIDTH ASYNC_SPI_CLK NUM_CS NUM_SDI SDI_DELAY}
set index [lsearch $spi_params $param]
return [lindex $params($device,$mode) $index]
}

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@ -6,7 +6,6 @@
PROJECT_NAME := ad469x_fmc_zed
M_DEPS += ../common/config.tcl
M_DEPS += ../common/ad469x_bd.tcl
M_DEPS += ../../scripts/adi_pd.tcl
M_DEPS += ../../common/zed/zed_system_constr.xdc
@ -20,7 +19,7 @@ LIB_DEPS += axi_clkgen
LIB_DEPS += axi_dmac
LIB_DEPS += axi_hdmi_tx
LIB_DEPS += axi_i2s_adi
LIB_DEPS += axi_pulse_gen
LIB_DEPS += axi_pwm_gen
LIB_DEPS += axi_spdif_tx
LIB_DEPS += axi_sysid
LIB_DEPS += spi_engine/axi_spi_engine

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@ -1,15 +1,8 @@
source ../../../scripts/adi_env.tcl
source ../../scripts/adi_project_xilinx.tcl
source ../../scripts/adi_board.tcl
source ../common/config.tcl
adi_project ad469x_fmc_zed 0 [list \
DATA_WIDTH [get_config_param DATA_WIDTH] \
ASYNC_SPI_CLK [get_config_param ASYNC_SPI_CLK] \
NUM_CS [get_config_param NUM_CS] \
NUM_SDI [get_config_param NUM_SDI] \
SDI_DELAY [get_config_param SDI_DELAY] \
]
adi_project ad469x_fmc_zed
adi_project_files ad469x_fmc_zed [list \
"../../../library/common/ad_iobuf.v" \