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common: Disable TTC0 MMIO routing for PS7 

We do not use the ttc0 to MMIO routing, but it is enabled by default, so
explicitly disable it.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
main
Lars-Peter Clausen 2014-09-29 19:08:33 +02:00
parent 6a08f26905
commit f7ad7e7ab2
4 changed files with 4 additions and 0 deletions
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1
projects/common/mitx045/mitx045_system_bd.tcl
View File

@ -33,6 +33,7 @@ set i2s_sdata_in [create_bd_port -dir I i2s_sdata_in]
set sys_ps7 [create_bd_cell -type ip -vlnv xilinx.com:ip:processing_system7:5.3 sys_ps7]
set_property -dict [list CONFIG.PCW_IMPORT_BOARD_PRESET $ad_hdl_dir/projects/common/mitx045/mitx045.xml ] [get_bd_cells sys_ps7]
set_property -dict [list CONFIG.PCW_TTC0_PERIPHERAL_ENABLE {0}] $sys_ps7
set_property -dict [list CONFIG.PCW_GPIO_MIO_GPIO_ENABLE {1} ] $sys_ps7
set_property -dict [list CONFIG.PCW_EN_CLK1_PORT {1}] $sys_ps7
set_property -dict [list CONFIG.PCW_EN_RST1_PORT {1}] $sys_ps7

1
projects/common/zc702/zc702_system_bd.tcl
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@ -26,6 +26,7 @@ set spdif [create_bd_port -dir O spdif]
set sys_ps7 [create_bd_cell -type ip -vlnv xilinx.com:ip:processing_system7:5.3 sys_ps7]
set_property -dict [list CONFIG.PCW_IMPORT_BOARD_PRESET {ZC702}] $sys_ps7
set_property -dict [list CONFIG.PCW_TTC0_PERIPHERAL_ENABLE {0}] $sys_ps7
set_property -dict [list CONFIG.PCW_EN_CLK1_PORT {1}] $sys_ps7
set_property -dict [list CONFIG.PCW_EN_RST1_PORT {1}] $sys_ps7
set_property -dict [list CONFIG.PCW_FPGA0_PERIPHERAL_FREQMHZ {100.0}] $sys_ps7

1
projects/common/zc706/zc706_system_bd.tcl
View File

@ -26,6 +26,7 @@ set spdif [create_bd_port -dir O spdif]
set sys_ps7 [create_bd_cell -type ip -vlnv xilinx.com:ip:processing_system7:5.3 sys_ps7]
set_property -dict [list CONFIG.PCW_IMPORT_BOARD_PRESET {ZC706}] $sys_ps7
set_property -dict [list CONFIG.PCW_TTC0_PERIPHERAL_ENABLE {0}] $sys_ps7
set_property -dict [list CONFIG.PCW_EN_CLK1_PORT {1}] $sys_ps7
set_property -dict [list CONFIG.PCW_EN_RST1_PORT {1}] $sys_ps7
set_property -dict [list CONFIG.PCW_FPGA0_PERIPHERAL_FREQMHZ {100.0}] $sys_ps7

1
projects/common/zed/zed_system_bd.tcl
View File

@ -45,6 +45,7 @@ set spdif [create_bd_port -dir O spdif]
set sys_ps7 [create_bd_cell -type ip -vlnv xilinx.com:ip:processing_system7:5.3 sys_ps7]
set_property -dict [list CONFIG.PCW_IMPORT_BOARD_PRESET {ZedBoard}] $sys_ps7
set_property -dict [list CONFIG.PCW_TTC0_PERIPHERAL_ENABLE {0}] $sys_ps7
set_property -dict [list CONFIG.PCW_EN_CLK1_PORT {1}] $sys_ps7
set_property -dict [list CONFIG.PCW_EN_RST1_PORT {1}] $sys_ps7
set_property -dict [list CONFIG.PCW_FPGA0_PERIPHERAL_FREQMHZ {100.0}] $sys_ps7