From fb5d21237053710d172d6f4107b0d1d94ad24e66 Mon Sep 17 00:00:00 2001 From: Rejeesh Kutty Date: Fri, 19 Sep 2014 15:54:55 -0400 Subject: [PATCH] daq2/kcu105: fixed timing violations --- projects/common/kcu105/kcu105_system_bd.tcl | 15 +++------------ projects/common/kcu105/kcu105_system_mig.tcl | 1 + projects/daq2/kcu105/system_bd.tcl | 5 ++--- 3 files changed, 6 insertions(+), 15 deletions(-) diff --git a/projects/common/kcu105/kcu105_system_bd.tcl b/projects/common/kcu105/kcu105_system_bd.tcl index 78cfae4b2..52c80ef65 100644 --- a/projects/common/kcu105/kcu105_system_bd.tcl +++ b/projects/common/kcu105/kcu105_system_bd.tcl @@ -104,9 +104,9 @@ set_property -dict [list CONFIG.NUM_MI {1}] $axi_mem_aux_interconnect set_property -dict [list CONFIG.ENABLE_ADVANCED_OPTIONS {1}] $axi_mem_aux_interconnect set_property -dict [list CONFIG.XBAR_DATA_WIDTH {512}] $axi_mem_aux_interconnect set_property -dict [list CONFIG.STRATEGY {2}] $axi_mem_aux_interconnect -# set_property -dict [list CONFIG.S00_HAS_REGSLICE {4}] $axi_mem_aux_interconnect -# set_property -dict [list CONFIG.S01_HAS_REGSLICE {4}] $axi_mem_aux_interconnect -set_property -dict [list CONFIG.M00_HAS_REGSLICE {4}] $axi_mem_aux_interconnect +set_property -dict [list CONFIG.S00_HAS_REGSLICE {3}] $axi_mem_aux_interconnect +set_property -dict [list CONFIG.S01_HAS_REGSLICE {3}] $axi_mem_aux_interconnect +set_property -dict [list CONFIG.M00_HAS_REGSLICE {3}] $axi_mem_aux_interconnect set axi_mem_interconnect [create_bd_cell -type ip -vlnv xilinx.com:ip:axi_interconnect:2.1 axi_mem_interconnect] set_property -dict [list CONFIG.NUM_SI {8}] $axi_mem_interconnect @@ -114,15 +114,6 @@ set_property -dict [list CONFIG.NUM_MI {1}] $axi_mem_interconnect set_property -dict [list CONFIG.ENABLE_ADVANCED_OPTIONS {1}] $axi_mem_interconnect set_property -dict [list CONFIG.XBAR_DATA_WIDTH {512}] $axi_mem_interconnect set_property -dict [list CONFIG.STRATEGY {2}] $axi_mem_interconnect -# set_property -dict [list CONFIG.S00_HAS_REGSLICE {4}] $axi_mem_interconnect -# set_property -dict [list CONFIG.S01_HAS_REGSLICE {4}] $axi_mem_interconnect -# set_property -dict [list CONFIG.S02_HAS_REGSLICE {4}] $axi_mem_interconnect -# set_property -dict [list CONFIG.S03_HAS_REGSLICE {4}] $axi_mem_interconnect -# set_property -dict [list CONFIG.S04_HAS_REGSLICE {4}] $axi_mem_interconnect -# set_property -dict [list CONFIG.S05_HAS_REGSLICE {4}] $axi_mem_interconnect -# set_property -dict [list CONFIG.S06_HAS_REGSLICE {4}] $axi_mem_interconnect -# set_property -dict [list CONFIG.S07_HAS_REGSLICE {4}] $axi_mem_interconnect -# set_property -dict [list CONFIG.M00_HAS_REGSLICE {4}] $axi_mem_interconnect # instance: default peripherals diff --git a/projects/common/kcu105/kcu105_system_mig.tcl b/projects/common/kcu105/kcu105_system_mig.tcl index c3128e3c6..83947c396 100644 --- a/projects/common/kcu105/kcu105_system_mig.tcl +++ b/projects/common/kcu105/kcu105_system_mig.tcl @@ -10,6 +10,7 @@ set_property -dict [list CONFIG.C0.DDR4_DataWidth {64}] $axi_ddr_cntrl set_property -dict [list CONFIG.C0.DDR4_Mem_Add_Map {ROW_BANK_COLUMN}] $axi_ddr_cntrl set_property -dict [list CONFIG.C0.DDR4_CasWriteLatency {12}] $axi_ddr_cntrl set_property -dict [list CONFIG.Debug_Signal {Enable}] $axi_ddr_cntrl +set_property -dict [list CONFIG.C0.DDR4_AxiDataWidth {512}] $axi_ddr_cntrl set_property -dict [list CONFIG.ADDN_UI_CLKOUT1_FREQ_HZ {100}] $axi_ddr_cntrl set_property -dict [list CONFIG.ADDN_UI_CLKOUT2_FREQ_HZ {200}] $axi_ddr_cntrl diff --git a/projects/daq2/kcu105/system_bd.tcl b/projects/daq2/kcu105/system_bd.tcl index ad253e8dd..d7a8388de 100644 --- a/projects/daq2/kcu105/system_bd.tcl +++ b/projects/daq2/kcu105/system_bd.tcl @@ -161,9 +161,8 @@ if {$sys_zynq == 0} { if {$sys_zynq == 0} { set_property -dict [list CONFIG.NUM_SI {11}] $axi_mem_interconnect -# set_property -dict [list CONFIG.S08_HAS_REGSLICE {4}] $axi_mem_interconnect -# set_property -dict [list CONFIG.S09_HAS_REGSLICE {4}] $axi_mem_interconnect -# set_property -dict [list CONFIG.S10_HAS_REGSLICE {4}] $axi_mem_interconnect + set_property -dict [list CONFIG.S09_HAS_REGSLICE {3}] $axi_mem_interconnect + set_property -dict [list CONFIG.S10_HAS_REGSLICE {3}] $axi_mem_interconnect set_property -dict [list CONFIG.NUM_PORTS {7}] $sys_concat_intc }