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ad_serdes_out: allow selection between DDR/SDR configuration and output single ended data

main
Adrian Costina 2017-03-29 10:25:54 +03:00 committed by Lars-Peter Clausen
parent 166a4c53d5
commit fc7f2ef11b
1 changed files with 7 additions and 3 deletions
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10
library/xilinx/common/ad_serdes_out.v
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@ -62,11 +62,13 @@ module ad_serdes_out #(
input [(DATA_WIDTH-1):0] data_s5,
input [(DATA_WIDTH-1):0] data_s6,
input [(DATA_WIDTH-1):0] data_s7,
output [(DATA_WIDTH-1):0] data_out_se,
output [(DATA_WIDTH-1):0] data_out_p,
output [(DATA_WIDTH-1):0] data_out_n);
localparam DEVICE_6SERIES = 1;
localparam DEVICE_7SERIES = 0;
localparam DR_OQ_DDR = DDR_OR_SDR_N == 1'b1 ? "DDR": "SDR";
// internal signals
@ -74,6 +76,8 @@ module ad_serdes_out #(
wire [(DATA_WIDTH-1):0] serdes_shift1_s;
wire [(DATA_WIDTH-1):0] serdes_shift2_s;
assign data_out_se = data_out_s;
// instantiations
genvar l_inst;
@ -82,7 +86,7 @@ module ad_serdes_out #(
if (DEVICE_TYPE == DEVICE_7SERIES) begin
OSERDESE2 #(
.DATA_RATE_OQ ("DDR"),
.DATA_RATE_OQ (DR_OQ_DDR),
.DATA_RATE_TQ ("SDR"),
.DATA_WIDTH (SERDES_FACTOR),
.TRISTATE_WIDTH (1),
@ -119,7 +123,7 @@ module ad_serdes_out #(
if (DEVICE_TYPE == DEVICE_6SERIES) begin
OSERDESE1 #(
.DATA_RATE_OQ ("DDR"),
.DATA_RATE_OQ (DR_OQ_DDR),
.DATA_RATE_TQ ("SDR"),
.DATA_WIDTH (SERDES_FACTOR),
.INTERFACE_TYPE ("DEFAULT"),
@ -156,7 +160,7 @@ module ad_serdes_out #(
.RST (rst));
OSERDESE1 #(
.DATA_RATE_OQ ("DDR"),
.DATA_RATE_OQ (DR_OQ_DDR),
.DATA_RATE_TQ ("SDR"),
.DATA_WIDTH (SERDES_FACTOR),
.INTERFACE_TYPE ("DEFAULT"),