From fdedc9568c04b98d3973aa0e4e78dbf78e9c6e20 Mon Sep 17 00:00:00 2001 From: Lars-Peter Clausen Date: Thu, 20 Apr 2017 19:22:23 +0200 Subject: [PATCH] axi_clkgen: Add interface definitions for clock inputs/outputs Add interface definition for the input and output clocks. This will allow the tools to recognize them as clocks and enable things like clock frequency propagation. Signed-off-by: Lars-Peter Clausen --- library/axi_clkgen/axi_clkgen_ip.tcl | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/library/axi_clkgen/axi_clkgen_ip.tcl b/library/axi_clkgen/axi_clkgen_ip.tcl index c74912019..6b93ee10e 100644 --- a/library/axi_clkgen/axi_clkgen_ip.tcl +++ b/library/axi_clkgen/axi_clkgen_ip.tcl @@ -17,6 +17,11 @@ adi_ip_properties axi_clkgen ipx::remove_bus_interface {clk} [ipx::current_core] ipx::associate_bus_interfaces -busif s_axi -clock s_axi_aclk [ipx::current_core] +ipx::infer_bus_interface clk xilinx.com:signal:clock_rtl:1.0 [ipx::current_core] +ipx::infer_bus_interface clk2 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core] +ipx::infer_bus_interface clk_0 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core] +ipx::infer_bus_interface clk_1 xilinx.com:signal:clock_rtl:1.0 [ipx::current_core] + set cc [ipx::current_core] set page0 [ipgui::get_pagespec -name "Page 0" -component $cc]