daq2/zcu102: Fix the ad9144 data offload to use internal BRAM

main
Mihaita Nagy 2021-09-23 12:31:40 +01:00 committed by Mihaita Nagy
parent 3640c2b584
commit ff090b60ef
2 changed files with 9 additions and 12 deletions

View File

@ -12,8 +12,6 @@ M_DEPS += ../../scripts/adi_pd.tcl
M_DEPS += ../../common/zcu102/zcu102_system_constr.xdc
M_DEPS += ../../common/zcu102/zcu102_system_bd.tcl
M_DEPS += ../../common/xilinx/data_offload_bd.tcl
M_DEPS += ../../common/xilinx/dacfifo_bd.tcl
M_DEPS += ../../common/xilinx/adcfifo_bd.tcl
M_DEPS += ../../../library/jesd204/scripts/jesd204.tcl
M_DEPS += ../../../library/common/ad_iobuf.v
@ -27,8 +25,6 @@ LIB_DEPS += jesd204/axi_jesd204_tx
LIB_DEPS += jesd204/jesd204_rx
LIB_DEPS += jesd204/jesd204_tx
LIB_DEPS += sysid_rom
LIB_DEPS += util_adcfifo
LIB_DEPS += util_dacfifo
LIB_DEPS += util_fifo2axi_bridge
LIB_DEPS += util_pack/util_cpack2
LIB_DEPS += util_pack/util_upack2

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@ -1,15 +1,16 @@
## Offload attributes
set adc_offload_type 0
set adc_offload_size [expr 1 * 1024 * 1024]
## FIFO depth is 8Mb - 500k samples
set adc_fifo_address_width 17
set dac_offload_type 0
set dac_offload_size [expr 1 * 1024 * 1024]
## FIFO depth is 8Mb - 500k samples
set dac_fifo_address_width 16
set plddr_offload_axi_data_width 0
set plddr_offload_axi_addr_width 0
## NOTE: With this configuration the #36Kb BRAM utilization is at ~57%
source $ad_hdl_dir/projects/common/zcu102/zcu102_system_bd.tcl
source $ad_hdl_dir/projects/common/xilinx/adcfifo_bd.tcl
source $ad_hdl_dir/projects/common/xilinx/dacfifo_bd.tcl
source ../common/daq2_bd.tcl
source $ad_hdl_dir/projects/scripts/adi_pd.tcl
@ -18,8 +19,8 @@ ad_ip_parameter axi_sysid_0 CONFIG.ROM_ADDR_BITS 9
ad_ip_parameter rom_sys_0 CONFIG.PATH_TO_FILE "[pwd]/mem_init_sys.txt"
ad_ip_parameter rom_sys_0 CONFIG.ROM_ADDR_BITS 9
sysid_gen_sys_init_file
set sys_cstring "ADC_OFFLOAD_TYPE=$adc_offload_type\nDAC_OFFLOAD_TYPE=$dac_offload_type"
sysid_gen_sys_init_file $sys_cstring
ad_ip_parameter util_daq2_xcvr CONFIG.QPLL_FBDIV 20
ad_ip_parameter util_daq2_xcvr CONFIG.QPLL_REFCLK_DIV 1