Commit Graph

5 Commits (01b3495a81cf08c53e4e88bc99119879263217c7)

Author SHA1 Message Date
Istvan Csomortani 17675863e0 all_projects: Fix the interrupt connections to preserve IRQ layout 2014-10-22 11:48:08 +03:00
Rejeesh Kutty 577441bd0c daq1: clean up dma interfaces 2014-09-23 14:23:41 -04:00
Istvan Csomortani dd7bac41c1 daq1 : Update project to 2014.2
- Cores are upadted
  - Concat module does not swap output anymore
  - Clock signal name ps7_clk_* changed to clk_fpga_*
2014-09-22 17:33:50 +03:00
Istvan Csomortani a91f4bb6b9 daq1: General updates
- Add additional GT setups
- Use channel PLL instead of quad PLL
- Add additional ILA probes for debug
2014-09-13 00:23:11 +03:00
Istvan Csomortani ee752ec08a daq1: Initial commit 2014-09-01 18:34:31 +03:00