Rejeesh Kutty
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871460016d
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makefile: added
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2015-04-01 16:27:54 -04:00 |
Rejeesh Kutty
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8f5551718e
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axi_fifo2s: false paths on up_xfer_toggle
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2015-03-19 16:33:14 -04:00 |
Rejeesh Kutty
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5a1819ed6e
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fifo2s: qualify last with valid
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2015-01-15 15:42:10 -05:00 |
Rejeesh Kutty
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16f64a75d6
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fifo2s: false path typo on source signals
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2014-12-15 13:00:13 -05:00 |
Istvan Csomortani
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19732d89fb
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plddr3: Fix the adc_dwr pulse width
The adc_dwr signal pulse width was to long, need to be just one adc_clk cycle.
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2014-12-09 13:51:00 +02:00 |
Rejeesh Kutty
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41ffc66c26
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fifo2s: removed m interface
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2014-11-13 15:00:03 -05:00 |
Rejeesh Kutty
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925e966eb6
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axi_fifo2s: fifo full replaced with ready
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2014-11-12 14:43:47 -05:00 |
Rejeesh Kutty
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5fc4f1b000
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axi_fifo2s: buswidth fix
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2014-11-12 14:43:46 -05:00 |
Rejeesh Kutty
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d204a7c2b7
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axi_fifo2s: include bus width/clock transfer
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2014-11-12 14:43:44 -05:00 |
Rejeesh Kutty
|
e7cec7171e
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axi_fifo2s: include bus width/clock transfer
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2014-11-12 14:43:43 -05:00 |
Rejeesh Kutty
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4381f20a6a
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axi_fifo2s: include bus width/clock transfer
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2014-11-12 14:43:42 -05:00 |
Rejeesh Kutty
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9f2dbad539
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axi_fifo2s: include bus width/clock transfer
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2014-11-12 14:43:41 -05:00 |
Rejeesh Kutty
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e683b5868e
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axi_fifo2s: include bus width/clock transfer
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2014-11-12 14:43:40 -05:00 |
Rejeesh Kutty
|
81b4cd532d
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axi_fifo2s: include bus width/clock transfer
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2014-11-12 14:43:38 -05:00 |
Rejeesh Kutty
|
888ab888d2
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axi_fifo2s: include bus width/clock transfer
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2014-11-12 14:43:37 -05:00 |
Rejeesh Kutty
|
206b96d55a
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ip: constraint changes
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2014-10-15 14:50:58 -04:00 |
Rejeesh Kutty
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51a15a28b7
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axi_fifo2s: added constraints
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2014-10-15 14:50:53 -04:00 |
Lars-Peter Clausen
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50faf0c53a
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Remove executable flags from non-exectuable files
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2014-09-09 15:05:06 +02:00 |
Istvan Csomortani
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4da8100fe5
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ad9625_plddr: Delete trailing whitespaces.
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2014-07-23 19:31:07 +03:00 |
Rejeesh Kutty
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2955b9db78
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fifo2s: flush if no request, c5soc: 14.0
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2014-07-15 16:25:33 -04:00 |
Rejeesh Kutty
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a9992f02b0
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fifo2s: bug fixes- on 64mhz dma clock
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2014-07-08 16:57:44 -04:00 |
Rejeesh Kutty
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b434fe6dd5
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fmcomms5: register map changes
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2014-07-08 16:57:43 -04:00 |
Rejeesh Kutty
|
e38813fa9f
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fifo- monitor status signals
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2014-06-25 12:15:13 -04:00 |
Rejeesh Kutty
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4877df9bec
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axi_fifo2s: make read dead slow
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2014-06-25 09:20:57 -04:00 |
rkutty
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5189d200e7
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axi_fifo2s: linux fix on interfaces
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2014-06-12 15:30:13 -04:00 |
Rejeesh Kutty
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f73819f4d4
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zc706: pl ddr3 initial checkin
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2014-05-13 16:19:53 -04:00 |