Commit Graph

302 Commits (059933b9c15cc61a29ccea98c26a238150bec18d)

Author SHA1 Message Date
Rejeesh Kutty c4b4bdc415 daq2/a10gx- constraints remove 16.0 2017-05-16 10:09:42 -04:00
Rejeesh Kutty cfcb269d38 a10gx- change ddr to 1G 2017-05-15 09:32:36 -04:00
Rejeesh Kutty ebeebdddf0 altera- infer latest versions 2017-05-12 13:40:14 -04:00
Lars-Peter Clausen 7a53b99b8b daq2: zc706: Increase DAC FIFO size
Currently the DAC FIFO size for the ZC706 DAQ2 project is 16kB. This is
quite a limiting size for practical applications. Increase the size to 1MB
to allow loading larger waveforms.

In this configuration the DAC FIFO will use half of the available BRAM
cells in the FPGA. This still leaves quite a few BRAMs available for
user application logic added to the design. If a user design should run out
of BRAMs nevertheless they can reduce the FIFO size, if not required by the
application, to free up some cells.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-04-28 12:29:01 +02:00
Istvan Csomortani b92703b59f daq2: Fix typo 2017-04-24 15:44:45 +03:00
Istvan Csomortani b9bc85dd1a daq2/zcu102: Update tcl command for IP configuration 2017-04-24 11:51:12 +03:00
Istvan Csomortani 871cfa7e5b daq2/kcu105: Update tcl command for IP configuration 2017-04-24 11:50:35 +03:00
Adrian Costina 942d69a30c Makefiles: Change MMU enabling parameter for altera designs from MMU to NIOS2_MMU 2017-04-18 10:57:16 +03:00
Istvan Csomortani 1c23cf4621 all: Update verilog files to verilog-2001 2017-04-13 11:59:55 +03:00
Rejeesh Kutty 454e6c0382 daq2- ad-ip-instance & ad-ip-parameter 2017-04-06 13:04:53 -04:00
Rejeesh Kutty 8063ba2b66 make updates 2017-03-20 16:05:18 -04:00
Istvan Csomortani 191669ad28 daq2_common: Fix the dac_rst for DAC FIFO 2017-03-07 16:13:46 +02:00
Istvan Csomortani 4a6fe54fcf daq2_common: Update common scripts
Add new port connection for util_dacfifo
2017-03-03 18:49:10 +02:00
AndreiGrozav b78e9d8c27 daq2_a10gx: Set XCVR Tx/RX clk/data voltage levels at 1V 2017-03-01 11:32:17 +02:00
Rejeesh Kutty fb4a583613 projects/system_bd- adc/dac fifo board designs 2017-02-27 16:06:39 -05:00
Rejeesh Kutty 6b1a8852a9 dacfifo- bypass port name change 2017-02-27 16:06:39 -05:00
Rejeesh Kutty edd5e9570f file renamed; sed output; fingers crossed 2017-02-22 15:56:37 -05:00
Rejeesh Kutty 096274a033 daq2/zcu102- fix refclock pin swap 2017-02-03 09:26:07 -05:00
Rejeesh Kutty 85ff496c12 daq2/a10gx- gpio match with others 2017-02-01 20:54:56 -05:00
Rejeesh Kutty 4a783d523d projects/altera* - default & common qsys commands 2016-12-20 16:27:44 -05:00
Adrian Costina 8ebc8fe4e2 updated makefiles 2016-12-09 23:06:41 +02:00
Rejeesh Kutty daa3df4b96 projects/- xcvr updates 2016-11-22 16:23:05 -05:00
Rejeesh Kutty b1a9bd96f1 daq2: xcvr pll changes 2016-11-22 12:53:29 -05:00
AndreiGrozav cac4057449 daq2/common: Altera updates 2016-11-15 16:03:52 +02:00
Rejeesh Kutty cb97bc500a hdlmake updates 2016-10-17 16:29:57 -04:00
Rejeesh Kutty 5bb77109ca daq2/a10gx- make fix 2016-10-10 13:03:44 -04:00
Rejeesh Kutty 905e29eb01 hdlmake- altera 2016-10-10 12:55:55 -04:00
Rejeesh Kutty e5cf417576 daq2/mb- xcvr procedures 2016-10-10 12:51:30 -04:00
Rejeesh Kutty 273073a584 daq2/kcu105- xcvr procedure 2016-10-10 11:12:47 -04:00
Rejeesh Kutty ffaf78665f daq2- xcvr procedures 2016-10-06 14:44:20 -04:00
Rejeesh Kutty 3b55822db3 daq2- xcvr connect 2016-10-06 14:09:27 -04:00
Rejeesh Kutty 721ee98a06 zcu102- misc fixes 2016-10-06 10:18:14 -04:00
Rejeesh Kutty ca4dca87e2 daq2- updates 2016-10-05 14:02:59 -04:00
Rejeesh Kutty 0208335ef3 hdlmake- updates 2016-09-30 13:20:22 -04:00
Rejeesh Kutty 27c9bdddb6 daq2/zcu102- 2016.2 updates 2016-09-30 11:55:10 -04:00
Rejeesh Kutty 0ded52d8f6 daq2/zcu102- kcu105 copy 2016-09-30 11:55:10 -04:00
Istvan Csomortani 16ee1336c3 Makefile: Update make files 2016-09-15 11:41:06 +03:00
Rejeesh Kutty 236a938425 daq2/a10gx- qsys updates 2016-09-12 14:57:50 -04:00
Rejeesh Kutty 5df30ac6b0 daq2/a10gx- xcvr sharing 2016-09-12 14:57:50 -04:00
Rejeesh Kutty 2f9ac4a342 altera- qsys-script does not support most tcl commands 2016-08-30 11:50:36 -04:00
Rejeesh Kutty 73413366bc daq2/all - warnings fix 2016-08-17 10:36:00 -04:00
Rejeesh Kutty 0b6fbf2208 daq2/vc707- 2016.2 updates 2016-08-17 10:34:06 -04:00
Rejeesh Kutty ce1fed1ce6 dmafifo- adc/dac split 2016-08-16 12:54:39 -04:00
Rejeesh Kutty 8311098384 daq2/kc705- adxcvr changes 2016-08-16 12:54:39 -04:00
Rejeesh Kutty 5d93e542ed daq2-kcu105: 2016.2 updates 2016-08-11 10:00:41 -04:00
Rejeesh Kutty c6f4def93d altera- make mmu a make switch 2016-08-08 11:54:51 -04:00
Istvan Csomortani 0cd608a7e2 lib_refactoring: Update Make files 2016-08-08 16:38:38 +03:00
Istvan Csomortani df36902713 lib_refactoring: Fix path of the IO macros 2016-08-08 15:07:19 +03:00
Istvan Csomortani f784557895 lib_refactoring: IOBUF is a Xilinx macro, no need to use with Altera 2016-08-08 15:06:34 +03:00
Adrian Costina d60bce654c Makefiles: Updated Makefiles so they run correctly with gnuwin32 tools 2016-08-05 15:16:04 +03:00
Rejeesh Kutty e42b4ea378 hdlmake- updates 2016-08-04 13:28:25 -04:00
Rejeesh Kutty ed9e92621c daq2- spi+xcvr address conflict 2016-08-04 10:50:31 -04:00
Adrian Costina 9a563de8ff daq2: A10GX updated project to Quartus 16.0
- connected directly axi_ad9680 to xcvr_core, skipping axi_jesd_xcvr
2016-08-01 15:09:53 +03:00
Istvan Csomortani 7ca8e10004 make: Update Make files 2016-08-01 14:24:48 +03:00
Shrutika Redkar 9952a94efb hdl-vivado-2016.2- ip version updates 2016-07-28 13:44:57 -04:00
Rejeesh Kutty 39a5534e00 hdlmake- updates 2016-07-21 16:10:38 -04:00
Rejeesh Kutty 6df5ba1a7a daq2- adxcvr version 2016-07-21 16:09:33 -04:00
Rejeesh Kutty eaf4d4a19d makefile updates 2016-06-10 14:26:14 -04:00
Rejeesh Kutty 468800bb38 daq2/a10gx- makefile update 2016-06-07 14:06:42 -04:00
Rejeesh Kutty 625052f46e daq2/a10gx- qsys updates 2016-06-07 12:28:04 -04:00
Rejeesh Kutty ae1dd1d58e daq2/a10gx- qsys updates 2016-06-07 12:28:04 -04:00
Rejeesh Kutty 3516ec28b7 daq2/a10gx- qsys updates 2016-06-07 12:28:04 -04:00
Rejeesh Kutty 39d23032f1 daq2- qsys updates 2016-05-23 10:55:44 -04:00
Istvan Csomortani b0538a03a2 Make: Update 2016-05-06 16:44:24 +03:00
Istvan Csomortani 4863a04132 axi_adc/dacfifo: Split the intergration script file
Split the integration script file into two separate script files. Rename the
integration processes names to be more meaningful.
2016-05-05 09:53:55 +03:00
Rejeesh Kutty 385ed31a45 make files update 2016-04-29 10:17:35 -04:00
Rejeesh Kutty 7a4a7edfba daq2/a10gx: 10AX115S3F45E2SGE3 version 2016-04-20 16:07:41 -04:00
Rejeesh Kutty e00236e5fd daq2/a10gx: 10AX115S3F45E2SGE3 version 2016-04-20 16:04:46 -04:00
AndreiGrozav 679d471d75 Merge branch 'hdl_2016_r1' into dev
hdl_2016_r1 contains IP core upgrades to Vivado 2015.4.2 and hdmi_tx improvements.
2016-04-19 18:05:50 +03:00
Rejeesh Kutty 3006c5a223 make updates 2016-04-11 16:14:59 -04:00
AndreiGrozav 21208ca208 Makefiles: Update Makefiles 2016-03-31 12:37:47 +03:00
Istvan Csomortani 1fab6ce477 daq2/common: Add util_dacfifo/dac_xfer_out control 2016-03-29 16:55:33 +03:00
Adrian Costina 657144d9a7 a10gx: Updated base design and DAQ2 to the new revision of the a10gx board
- tried using ATX PLL and fPLL for TX transceiver clocks, but could not get them to lock
- CMU PLL works correctly as temporary solution
2016-03-28 13:21:36 +03:00
AndreiGrozav b7be089b82 daq2: Updated common design to 2015.4 2016-03-16 10:02:42 +02:00
Adrian Costina 977d9d0624 Merge branch 'hdl_2015_r2' into dev
Conflicts:
	projects/daq1/common/daq1_spi.v
2016-03-02 13:52:15 +02:00
Adrian Costina 40fb68dfd5 ad9265, ad9434, ad9467, daq1, daq2, daq3, fmcadc2, fmcadc4, fmcadc5, fmcjesdadc1, fmcomms6, fmcomms7, usdrx1: updated common spi module so that spi streaming is possible 2016-03-02 13:39:37 +02:00
Adrian Costina becc23a69b daq2: Modified common spi module so that spi streaming is possible
- stop incrementing spi_count after the instruction cycle
2016-03-01 17:25:58 +02:00
Rejeesh Kutty e012d0519b Merge remote-tracking branch 'origin/hdl_2015_r2' into dev 2016-02-26 13:39:39 -05:00
Adrian Costina 8ccd8d87bb daq2: A10GX, increase analog/digital reset durations
- reset the xcvr_rst_cntrl only from the axi_jesd_xcvr
- checked separate RX/TX reset per channel
2016-02-23 11:41:38 +02:00
Adrian Costina 377461e0d4 Merge branch 'hdl_2015_r2' into dev 2016-02-19 14:15:27 +02:00
Adrian Costina ad9ecbbbb6 daq2: Updated a10gx project to quartus 15.1.1 2016-02-05 17:43:05 +02:00
Istvan Csomortani e22d5d5c18 daq2: Fix clock constraints for KC705 and VC707 2016-01-22 19:09:57 +02:00
Rejeesh Kutty da2e1bdc9a daq2/a10gx: 32bits generic gpio 2015-12-11 11:50:26 -05:00
Adrian Costina 2309c4d83c Makefiles: Removed " from path 2015-11-27 14:02:46 +02:00
Adrian Costina 159f6c1216 Makefiles: Updated Makefiles
- for altera projects, taken into consideration of the new location for common qsys files
- for fmcomms5, added wfifo dependency
- for daq3, added mfifo dependency
2015-11-27 12:39:42 +02:00
Adrian Costina ea57b3c03c daq2: A10GX, add project specific IP search paths 2015-11-25 10:58:36 +02:00
Adrian Costina a81625e1fa daq2: Updated a10gx project 2015-11-24 13:28:53 +02:00
Adrian Costina 5cc97c78d3 Makefiles: Update makefiles to include the nerw axi_gpreg / util_mfifo libraries 2015-11-10 09:32:50 +02:00
Adrian Costina e36f27b061 daq2: Update A10GX project, with the latest changes.
Works with up to 64k samples
2015-11-04 14:54:09 +02:00
Adrian Costina 9d2b8809df Makefiles: Updated Makefiles 2015-10-23 10:44:27 +03:00
Lars-Peter Clausen 7184827d68 daq2: Drop explicit axi_dmac clock synchronicity configuration
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-09-18 15:27:54 +02:00
Istvan Csomortani a679251d7d Makefiles: Update Make 2015-09-09 17:13:19 +03:00
Rejeesh Kutty f1d416a98b daq2/a10gx- ethernet fix 2015-09-02 14:31:15 -04:00
Rejeesh Kutty 1fff1076b1 daq2/a10gx- ethernet fix 2015-09-02 14:31:15 -04:00
Rejeesh Kutty 15be942b74 daq2-a10gx- ignore cpu2ddr-io paths 2015-08-27 13:54:05 -04:00
Rejeesh Kutty 90e4cadf4b daq2/kcu105- xcvr pin loc 2015-08-27 12:40:44 -04:00
Rejeesh Kutty 7c8e56cb09 daq2/kcu105- pin loc is now all errors 2015-08-27 11:18:00 -04:00
Rejeesh Kutty 89c7a4de79 daq2/kcu105- parameter changes 2015-08-27 11:18:00 -04:00
Rejeesh Kutty 58fa29b673 daq2- jesd core upgrade 2015-08-27 11:18:00 -04:00
Rejeesh Kutty 78cf0fce0e ddr/eth- pll refclock is defined by the cores 2015-08-21 14:42:15 -04:00