Commit Graph

629 Commits (074662a622e9e2ca2afd0191a6ee936f694238ed)

Author SHA1 Message Date
Rejeesh Kutty 074662a622 dmafifo: common interface with fifo2s 2014-11-12 15:24:31 -05:00
Rejeesh Kutty 8761db438e axi_fifo2f: common interface with fifo2s 2014-11-12 15:15:32 -05:00
Rejeesh Kutty 855919ee8e plddr3: internal buswidth/clock conversion 2014-11-12 14:43:50 -05:00
Rejeesh Kutty dbf5acde76 plddr3: internal buswidth/clock conversion 2014-11-12 14:43:49 -05:00
Rejeesh Kutty c6af2696b3 plddr3: internal buswidth/clock conversion 2014-11-12 14:43:48 -05:00
Rejeesh Kutty 925e966eb6 axi_fifo2s: fifo full replaced with ready 2014-11-12 14:43:47 -05:00
Rejeesh Kutty 5fc4f1b000 axi_fifo2s: buswidth fix 2014-11-12 14:43:46 -05:00
Rejeesh Kutty d204a7c2b7 axi_fifo2s: include bus width/clock transfer 2014-11-12 14:43:44 -05:00
Rejeesh Kutty e7cec7171e axi_fifo2s: include bus width/clock transfer 2014-11-12 14:43:43 -05:00
Rejeesh Kutty 4381f20a6a axi_fifo2s: include bus width/clock transfer 2014-11-12 14:43:42 -05:00
Rejeesh Kutty 9f2dbad539 axi_fifo2s: include bus width/clock transfer 2014-11-12 14:43:41 -05:00
Rejeesh Kutty e683b5868e axi_fifo2s: include bus width/clock transfer 2014-11-12 14:43:40 -05:00
Rejeesh Kutty 81b4cd532d axi_fifo2s: include bus width/clock transfer 2014-11-12 14:43:38 -05:00
Rejeesh Kutty 888ab888d2 axi_fifo2s: include bus width/clock transfer 2014-11-12 14:43:37 -05:00
Istvan Csomortani f8e7796592 axi_jesd_gt: Fix lane number parameters 2014-11-12 17:43:32 +02:00
Istvan Csomortani bf62665c56 prcfg_qpsk: Add Simulink model
Matlab version used: R2014a, HDL Coder 3.3
2014-11-12 15:44:38 +02:00
Adrian Costina ce92d49565 adv7511: Updated VC707 project to include linear flash 2014-11-12 11:46:01 +02:00
Istvan Csomortani 897f5e219d ad9625_zc706: Update GT configuration 2014-11-11 19:25:30 +02:00
Istvan Csomortani 776a396141 adi_project.tcl: Add new message severity definition
Set "Parameter does not exist!" message severity to error.
2014-11-11 19:20:40 +02:00
Rejeesh Kutty 8147fa0eb6 fmcomms7: asymmetric no of lanes 2014-11-11 08:54:27 -05:00
Rejeesh Kutty 439cbecf7c fmcomms7: asymmetric no of lanes 2014-11-11 08:54:26 -05:00
Rejeesh Kutty b96a8d01c3 fmcomms7: asymmetric no of lanes 2014-11-11 08:54:25 -05:00
Rejeesh Kutty 64ec633438 gt: asymmetric no of lanes 2014-11-11 08:54:24 -05:00
Paul Cercueil 97fa063341 fmcadc3: Fix pre-processing of ADC data
Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
2014-11-11 11:49:40 +01:00
Paul Cercueil 4ccece5c8d fmcadc3: Add a chip-select decoder to support up to 7 devices
This is required for the fmcadc3 board as it features 7 chips all
connected to the same SPI bus (ad9528, ad9234 x2, ada4961 x4).

Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
2014-11-11 11:49:40 +01:00
Adrian Costina 05ed98f884 common: Updated common constratins for ac701, kc705, vc707, zc702 2014-11-11 12:35:44 +02:00
Rejeesh Kutty c1268f089d scripts: hp/mem updates 2014-11-10 15:06:20 -05:00
Rejeesh Kutty 3211964c2e ad6676evb: added 2014-11-10 13:41:01 -05:00
Rejeesh Kutty cb15567a56 ad6676: added 2014-11-10 13:36:07 -05:00
Rejeesh Kutty 4c0d053055 fmcomms7: compilation fixes 2014-11-10 13:26:28 -05:00
Rejeesh Kutty b85c552e43 fmcomms7: constraint updates 2014-11-10 13:26:27 -05:00
Rejeesh Kutty 87000d7a23 fmcomms7: board updates 2014-11-10 13:26:26 -05:00
Rejeesh Kutty 82048866dd fmcomms7: initial updates 2014-11-10 13:26:25 -05:00
Rejeesh Kutty c72a04cecf fmcomms7: initial updates 2014-11-10 13:26:24 -05:00
Rejeesh Kutty 4d915d539f fmcomms7: initial updates 2014-11-10 13:26:23 -05:00
Rejeesh Kutty 0560bd5f99 fmcomms7: initial updates 2014-11-10 13:26:21 -05:00
Rejeesh Kutty cbcdf4a2aa fmcomms7: initial updates 2014-11-10 13:26:20 -05:00
Rejeesh Kutty 1edef2b8ff fmcomms7: initial updates 2014-11-10 13:26:19 -05:00
Rejeesh Kutty 12896c7624 fmcomms7: daq2 copy 2014-11-10 13:26:18 -05:00
Rejeesh Kutty 50ce2e30be daq2: ila changes for kcu105 timing 2014-11-10 10:57:35 -05:00
Paul Cercueil 1d73adcbc4 fmcadc3: zc706: Allow to enable pairs of channels and sign-extend data
Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
2014-11-07 18:09:00 +01:00
Paul Cercueil c33d3dd0af fmcadc3: zc706: Connect DMA interrupt line
Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
2014-11-07 18:08:24 +01:00
Adrian Costina ad08c62b36 fmcomms2: Updated zc702 project. Updated interrupts. Updated constraints 2014-11-07 14:01:55 +02:00
Adrian Costina 4e11e39956 fmcomms2: Updated zed project
- Updated interrupt system to the latest implementation
- Fixed constraints
2014-11-07 13:59:46 +02:00
Adrian Costina 962df53946 fmcomms2: Updated kc705 project to vivado 2014.2.
- Updated interrupt system to the latest implementation
- Fixed constraints
- Used ad_iobuf
2014-11-07 13:58:40 +02:00
Adrian Costina db18ed4af2 fmcomms2: Updated ac701 project to vivado 2014.2.
- Updated interrupt system to the latest implementation
- Fixed constraints
- Used ad_iobuf
2014-11-07 13:56:00 +02:00
Adrian Costina 7e2a9ce569 fmcomms2: Updated base design interrupt system for microblaze 2014-11-07 13:54:43 +02:00
Adrian Costina 0ade2a5f67 fmcomms5: Updated project to vivado 2014.2. Updated interrupt system. Fixed constraints 2014-11-07 13:45:15 +02:00
Rejeesh Kutty 2d9a529ab8 kcu105: ddr - 800M 2014-11-06 16:50:37 -05:00
Rejeesh Kutty abad8ddc28 ad9625x2: fix ila connection 2014-11-06 14:22:46 -05:00