Adrian Costina
a7da779b94
Makefile: Updated Makefiles
2015-07-16 18:19:42 +03:00
Rejeesh Kutty
4e99a2cb01
xcvr: remove signal tap
2015-07-16 08:09:56 -04:00
Rejeesh Kutty
a454b73d27
fmcjesdadc1/a5gt: split xcvr cores
2015-07-15 09:44:53 -04:00
Rejeesh Kutty
2d8fa2024b
fmcjesdadc1/a5gt: split xcvr cores
2015-07-15 09:44:52 -04:00
Rejeesh Kutty
226e23ca1f
fmcjesdadc1- xcvr components
2015-07-15 09:44:51 -04:00
Rejeesh Kutty
f64df40a0a
signal tap removed
2015-07-08 15:47:50 -04:00
Rejeesh Kutty
19bf05c740
signal tap removed
2015-07-08 15:47:48 -04:00
Rejeesh Kutty
bbf1c5b803
transceiver core added/gpio removed
2015-07-07 15:30:38 -04:00
Istvan Csomortani
46fa91d5be
Makefile: Update Make files
2015-07-03 18:08:57 +03:00
Rejeesh Kutty
18e8914087
fmcjesdadc1/a5gt: pn-errors version
2015-07-01 13:43:12 -04:00
Rejeesh Kutty
35aca98b5f
fmcjesdadc1/stap: added
2015-07-01 13:43:10 -04:00
Rejeesh Kutty
330c205e8e
fmcjesdadc1- sys_clk changes
2015-06-30 10:47:21 -04:00
Lars-Peter Clausen
6862655b0d
Add .gitattributes file
...
Add .gitattributes file which sets up the eol encoding handling. This will
make sure that we get a uniform eol encoding across different operating
systems.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-06-26 11:07:10 +02:00
Rejeesh Kutty
543e08b67a
fmcadc1: sdc updates
2015-06-25 04:25:39 -04:00
Rejeesh Kutty
15740a7d34
fmcjesdadc1- 15.0 updates
2015-06-24 05:31:09 -04:00
Adrian Costina
301226c766
fmcjesdadc1: Fixed mdc_mdio connection for kc705
2015-06-18 11:06:47 +03:00
Adrian Costina
8fc0e0e62d
fmcjesdadc1: Fixed vc707 ethernet connections
2015-06-16 16:27:09 +03:00
Rejeesh Kutty
f81d22a17a
altera- common timing check
2015-06-04 10:56:32 -04:00
Rejeesh Kutty
71b5004b25
projects- drp moved to up-clock domain
2015-06-01 14:57:59 -04:00
Rejeesh Kutty
a6cae6b477
iobuf: do is a system verilog keyword
2015-05-21 14:06:17 -04:00
Lars-Peter Clausen
6b9906b22b
Refresh Makefiles
...
Re-generate the Makefiles after a small update to the generation script:
- Entries are sorted alphabetically
- Empty dependency lines are skipped
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-05-21 14:21:54 +02:00
Adrian Costina
c19749361d
Makefiles: Updated makefiles to have as a result the programming file instead of the project file.
...
Also fixed altera projects dependencies
2015-05-18 17:22:46 +03:00
Adrian Costina
91279253ef
Makefiles: Added mig project file as a dependency for Microblaze based projects. Also updated usdrx1 a5gt Makefile
2015-05-08 15:31:40 +03:00
Adrian Costina
1c9b41db6f
fmcjesdadc1: A5GT project, added modular sgdma for Ethernet, nios configured for linux
2015-05-08 14:51:24 +03:00
Adrian Costina
949abcdc8f
Makefile: Updated makefiles so that the project recipe does not depend on lib
2015-05-06 14:58:29 +03:00
Adrian Costina
e332fa01c8
ad6676evb, daq2, fmcadc2, fmcjesdadc1, usdrx1: Updated jesd reset connection
2015-04-30 12:11:46 +03:00
Adrian Costina
dc2b37bd0c
Makefile: Added top level Makefile. Modified behavior of clean and clean-all
...
Clean ran for a project will clean only the project files.
Clean-all ran for a project will clean also the library files on which the project depends.
The clean commands will only remove specific files and directories.
The top Makefile allows several options(per suggestion from jameyhicks):
make fmcomms1.zed will run "make all" in projects/fmcomms1/zed/
make clean will run "make clean" for all the projects
make clean-all will run "make clean" for all the projects and libraries
make lib will run "make all" for the library files
2015-04-17 17:22:38 +03:00
Adrian Costina
374f82e7de
makefiles: The clean command for library won't remove the xml files, except for component.xml.
...
Updated also the dmac dependencies
2015-04-16 11:53:27 +03:00
Adrian Costina
780455d68c
Makefile: Updated makefiles. Added makefiles for altera
2015-04-09 17:57:06 +03:00
Rejeesh Kutty
5f8e9a74ea
makefile: updated
2015-04-07 16:32:01 -04:00
Rejeesh Kutty
0a8823361f
fmcjesdadc1/a5gt: 14.1 updates
2015-04-03 14:54:57 -04:00
Rejeesh Kutty
3aac5f9494
fmcjesdadc1/a5gt: 14.1 updates
2015-04-03 14:54:55 -04:00
Adrian Costina
49b8d389f6
fmcjesdadc1: Kc705, fixed system top,SPI
2015-04-03 18:28:26 +03:00
Adrian Costina
f79a152958
Makefiles: updated all makefiles adding clean functionality
2015-04-03 11:57:54 +03:00
Rejeesh Kutty
9e8cb22c96
makefile: added
2015-04-01 16:29:21 -04:00
Rejeesh Kutty
0a62cc9b8e
makefile: added
2015-04-01 16:29:19 -04:00
Rejeesh Kutty
661cdc5752
makefile: added
2015-04-01 16:29:18 -04:00
Rejeesh Kutty
0275f5575b
makefile: added
2015-04-01 16:29:17 -04:00
Rejeesh Kutty
b7d72a5b2e
makefile: added
2015-04-01 16:29:16 -04:00
Rejeesh Kutty
71adb70844
makefile: added
2015-04-01 16:29:14 -04:00
Adrian Costina
11379939d0
fmcjesdadc1: VC707, Updated project to the latest framework
2015-03-30 18:08:19 +03:00
Adrian Costina
c7e4ba5083
fmcjesdadc1: Updated KC705 to the latest flow
2015-03-30 18:07:47 +03:00
Adrian Costina
ccf0542218
fmcjesdadc1: Connected constant 0 to unconnected inputs
2015-03-26 12:08:14 +02:00
Adrian Costina
d418c9f9b1
fmcjesdadc1: Updated project to new flow. Updated ZC706 design
2015-03-24 10:38:14 +02:00
Adrian Costina
9672271155
fmcjestadc1: a5gt: Updated project to work with linux and fixed ethernet
...
- added phy reset mechanism for proper functioning of the ethernet
- not all DDR is accesible, as NIOS2 can't access it with MMU enabled
2015-01-23 13:30:56 +02:00
Adrian Costina
47871287f3
kc705: Updated base project with linear flash. Updated all depending projects
2015-01-13 10:19:07 +02:00
Rejeesh Kutty
ca36ef0e02
Merge remote-tracking branch 'origin/hdl_2014_r2' into dev
2014-12-11 11:26:30 -05:00
Adrian Costina
6ac774a9dd
fmcjesdadc1: Update altera system_timing script
2014-12-10 17:53:29 +02:00
Michael Hennerich
138e789fb6
projects/fmcjesdadc1/common/fmcjesdadc1_bd.tcl: Fix interrupts
...
sys_concat_intc: don't reset NUM_PORTS to 6
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-09 17:38:16 +01:00
Istvan Csomortani
915ee7a268
fmcjesdadc1_kc705: Connect the SPI interrupt to the controller
2014-12-09 11:54:16 +02:00