Adrian Costina
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31ab81d627
|
a5gt: Updated ethernet clock constraints
|
2015-07-27 16:02:51 +03:00 |
Rejeesh Kutty
|
a1733238df
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fmcjesdadc1- base/board split up
|
2015-07-23 15:21:53 -04:00 |
|
Rejeesh Kutty
|
3e2712cf18
|
a5gt-base: initial updates
|
2015-07-22 15:22:22 -04:00 |
|
Rejeesh Kutty
|
64070b6f27
|
a5gt- base system
|
2015-07-22 15:04:59 -04:00 |
|
Rejeesh Kutty
|
15740a7d34
|
fmcjesdadc1- 15.0 updates
|
2015-06-24 05:31:09 -04:00 |
|
Rejeesh Kutty
|
a8a71b4971
|
alt-tq: common file
|
2015-06-04 11:00:25 -04:00 |
|
Adrian Costina
|
5a77ab0161
|
a5gt:common: Added phy reset signal from ethernet in pin assignments
|
2015-01-23 12:31:41 +02:00 |
|
Rejeesh Kutty
|
3deb55bb98
|
a5gt: ethernet i/o changed to lvds
|
2014-09-04 11:19:24 -04:00 |
|
Rejeesh Kutty
|
cb29b83b05
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a5gt: updates to match a5gt
|
2014-08-25 10:46:59 -04:00 |
|
Rejeesh Kutty
|
04ab34c8ed
|
a5gt: ethernet assignments
|
2014-04-03 20:50:16 -04:00 |
|
Rejeesh Kutty
|
0d678b89ed
|
altera a5gt fmcjesdadc1 setup
|
2014-04-01 11:46:37 -04:00 |