Commit Graph

41 Commits (0ae79ca7ac426815b568a5bd5aaeab94cee81db2)

Author SHA1 Message Date
AndreiGrozav e736504e0f fmcjesdadc1, usdrx1: Using the same clock in rx_data path 2017-03-10 14:26:51 +02:00
Rejeesh Kutty aa6c94c993 usdrx1/a5gt: ddr3 use ip constraints 2016-12-22 14:14:21 -05:00
Rejeesh Kutty 4a783d523d projects/altera* - default & common qsys commands 2016-12-20 16:27:44 -05:00
Istvan Csomortani da7f4608a8 fmcjesdadc1/usdrx1: Clean up the mess
Delete accidentally commited generated files.
2016-12-19 15:35:20 +00:00
Istvan Csomortani f47863bbcf usdrx1: Integrate ad_syref_gen into the project 2016-12-19 14:36:01 +00:00
Adrian Costina 8ebc8fe4e2 updated makefiles 2016-12-09 23:06:41 +02:00
Rejeesh Kutty f799c40cf0 usdrx1/a5gt- xcvr interface changes 2016-12-08 16:05:23 -05:00
Rejeesh Kutty c114888956 usdrx1- updates 2016-12-08 16:05:23 -05:00
Rejeesh Kutty 170c781d02 hdlmake.pl- updates 2016-12-01 13:52:11 -05:00
Rejeesh Kutty 905e29eb01 hdlmake- altera 2016-10-10 12:55:55 -04:00
Istvan Csomortani 16ee1336c3 Makefile: Update make files 2016-09-15 11:41:06 +03:00
Adrian Costina 0b0aa8e6c0 Makefile: Add MMU option to altera makefiles 2016-08-11 17:46:54 +03:00
Adrian Costina d60bce654c Makefiles: Updated Makefiles so they run correctly with gnuwin32 tools 2016-08-05 15:16:04 +03:00
Rejeesh Kutty eaf4d4a19d makefile updates 2016-06-10 14:26:14 -04:00
Rejeesh Kutty 3006c5a223 make updates 2016-04-11 16:14:59 -04:00
Adrian Costina 33b265a742 Makefile: Update Makefiles 2016-03-14 09:31:17 +02:00
Rejeesh Kutty be075379df hdlmake: updates 2015-12-07 13:11:24 -05:00
Adrian Costina 9d2b8809df Makefiles: Updated Makefiles 2015-10-23 10:44:27 +03:00
Istvan Csomortani a679251d7d Makefiles: Update Make 2015-09-09 17:13:19 +03:00
Istvan Csomortani b84afcdcd1 Merge branch 'master' into dev
Conflicts:
	library/Makefile
	library/axi_ad6676/axi_ad6676_ip.tcl
	library/axi_ad9122/axi_ad9122_core.v
	library/axi_ad9122/axi_ad9122_ip.tcl
	library/axi_ad9144/axi_ad9144_ip.tcl
	library/axi_ad9152/axi_ad9152_ip.tcl
	library/axi_ad9234/axi_ad9234_ip.tcl
	library/axi_ad9250/axi_ad9250_hw.tcl
	library/axi_ad9250/axi_ad9250_ip.tcl
	library/axi_ad9361/axi_ad9361.v
	library/axi_ad9361/axi_ad9361_dev_if_alt.v
	library/axi_ad9361/axi_ad9361_ip.tcl
	library/axi_ad9361/axi_ad9361_rx_channel.v
	library/axi_ad9361/axi_ad9361_tdd.v
	library/axi_ad9361/axi_ad9361_tx_channel.v
	library/axi_ad9625/axi_ad9625_ip.tcl
	library/axi_ad9643/axi_ad9643_channel.v
	library/axi_ad9643/axi_ad9643_ip.tcl
	library/axi_ad9652/axi_ad9652_channel.v
	library/axi_ad9652/axi_ad9652_ip.tcl
	library/axi_ad9671/axi_ad9671_constr.xdc
	library/axi_ad9671/axi_ad9671_ip.tcl
	library/axi_ad9680/axi_ad9680_ip.tcl
	library/axi_ad9739a/axi_ad9739a_ip.tcl
	library/axi_dmac/axi_dmac_constr.sdc
	library/axi_hdmi_tx/axi_hdmi_tx_ip.tcl
	library/axi_jesd_gt/axi_jesd_gt_constr.xdc
	library/axi_jesd_gt/axi_jesd_gt_ip.tcl
	library/axi_mc_speed/axi_mc_speed_constr.xdc
	library/common/ad_gt_channel_1.v
	library/common/ad_gt_common_1.v
	library/common/ad_gt_es.v
	library/common/ad_iqcor.v
	library/common/ad_jesd_align.v
	library/common/ad_rst.v
	library/common/altera/ad_xcvr_rx_rst.v
	library/common/up_adc_common.v
	library/common/up_axis_dma_rx.v
	library/common/up_axis_dma_tx.v
	library/common/up_clkgen.v
	library/common/up_clock_mon.v
	library/common/up_dac_common.v
	library/common/up_gt.v
	library/common/up_hdmi_tx.v
	library/common/up_tdd_cntrl.v
	library/common/up_xfer_cntrl.v
	library/common/up_xfer_status.v
	library/util_cpack/util_cpack.v
	library/util_cpack/util_cpack_ip.tcl
	library/util_dac_unpack/util_dac_unpack_hw.tcl
	library/util_jesd_align/util_jesd_align.v
	library/util_jesd_xmit/util_jesd_xmit.v
	library/util_upack/util_upack_ip.tcl
	library/util_wfifo/util_wfifo.v
	library/util_wfifo/util_wfifo_constr.xdc
	library/util_wfifo/util_wfifo_ip.tcl
	projects/arradio/c5soc/system_bd.qsys
	projects/common/vc707/vc707_system_bd.tcl
	projects/common/zc706/zc706_system_plddr3.tcl
	projects/daq2/a10gx/Makefile
	projects/daq2/a10gx/system_bd.qsys
	projects/daq3/common/daq3_bd.tcl
	projects/daq3/zc706/system_bd.tcl
	projects/fmcjesdadc1/a5gt/Makefile
	projects/fmcjesdadc1/a5gt/system_bd.qsys
	projects/fmcjesdadc1/a5gt/system_constr.sdc
	projects/fmcjesdadc1/a5gt/system_top.v
	projects/fmcjesdadc1/a5soc/system_bd.qsys
	projects/fmcjesdadc1/common/fmcjesdadc1_bd.tcl
	projects/fmcomms1/ac701/system_bd.tcl
	projects/fmcomms1/common/fmcomms1_bd.tcl
	projects/fmcomms1/kc705/system_bd.tcl
	projects/fmcomms1/vc707/system_bd.tcl
	projects/fmcomms1/zc702/system_bd.tcl
	projects/fmcomms1/zc702/system_top.v
	projects/fmcomms1/zc706/system_bd.tcl
	projects/fmcomms1/zc706/system_top.v
	projects/fmcomms1/zed/system_bd.tcl
	projects/fmcomms1/zed/system_top.v
	projects/fmcomms2/ac701/system_constr.xdc
	projects/fmcomms2/common/fmcomms2_bd.tcl
	projects/fmcomms2/kc705/system_constr.xdc
	projects/fmcomms2/kc705/system_top.v
	projects/fmcomms2/mitx045/system_top.v
	projects/fmcomms2/rfsom/system_constr.xdc
	projects/fmcomms2/rfsom/system_top.v
	projects/fmcomms2/vc707/system_top.v
	projects/fmcomms2/zc706/system_bd.tcl
	projects/fmcomms2/zc706/system_constr.xdc
	projects/fmcomms2/zc706/system_top.v
	projects/fmcomms2/zed/system_top.v
	projects/imageon/zc706/system_constr.xdc
	projects/motcon2_fmc/common/motcon2_fmc_bd.tcl
	projects/motcon2_fmc/zed/system_constr.xdc
	projects/motcon2_fmc/zed/system_top.v
	projects/usdrx1/a5gt/Makefile
	projects/usdrx1/a5gt/system_bd.qsys
	projects/usdrx1/common/usdrx1_bd.tcl

Conflicts were resolved using 'Mine' (/dev).
2015-08-17 15:15:58 +03:00
Adrian Costina c200fc8019 usdrx1: Updated a5gt project to Quartus 15 2015-08-12 10:20:58 +03:00
Adrian Costina a7da779b94 Makefile: Updated Makefiles 2015-07-16 18:19:42 +03:00
Istvan Csomortani 46fa91d5be Makefile: Update Make files 2015-07-03 18:08:57 +03:00
Lars-Peter Clausen c372064302 Add .gitattributes file
Add .gitattributes file which sets up the eol encoding handling. This will
make sure that we get a uniform eol encoding across different operating
systems.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-07-01 18:43:51 +02:00
Lars-Peter Clausen 6862655b0d Add .gitattributes file
Add .gitattributes file which sets up the eol encoding handling. This will
make sure that we get a uniform eol encoding across different operating
systems.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-06-26 11:07:10 +02:00
Adrian Costina fcc185d769 Makefile: Updated makefiles
- removed up_drp_control, up_delay_control dependencies where not needed
- added axi_jesd_gt core in the library makefile
- fixed timing tcl dependency for altera projects
2015-06-25 14:59:34 +03:00
Rejeesh Kutty f81d22a17a altera- common timing check 2015-06-04 10:56:32 -04:00
Rejeesh Kutty 4927ca85c2 projects- jesd-align port name change 2015-05-20 14:24:26 -04:00
Adrian Costina c19749361d Makefiles: Updated makefiles to have as a result the programming file instead of the project file.
Also fixed altera projects dependencies
2015-05-18 17:22:46 +03:00
Adrian Costina 91279253ef Makefiles: Added mig project file as a dependency for Microblaze based projects. Also updated usdrx1 a5gt Makefile 2015-05-08 15:31:40 +03:00
Adrian Costina 573acc8af6 usdrx1: A5GT project updated to 14.1 2015-05-08 15:04:44 +03:00
Adrian Costina dc2b37bd0c Makefile: Added top level Makefile. Modified behavior of clean and clean-all
Clean ran for a project will clean only the project files.
Clean-all ran for a project will clean also the library files on which the project depends.
The clean commands will only remove specific files and directories.

The top Makefile allows several options(per suggestion from jameyhicks):
make fmcomms1.zed will run "make all" in projects/fmcomms1/zed/
make clean will run "make clean" for all the projects
make clean-all will run "make clean" for all the projects and libraries
make lib will run "make all" for the library files
2015-04-17 17:22:38 +03:00
Adrian Costina 374f82e7de makefiles: The clean command for library won't remove the xml files, except for component.xml.
Updated also the dmac dependencies
2015-04-16 11:53:27 +03:00
Adrian Costina 780455d68c Makefile: Updated makefiles. Added makefiles for altera 2015-04-09 17:57:06 +03:00
Rejeesh Kutty 5f8e9a74ea makefile: updated 2015-04-07 16:32:01 -04:00
Adrian Costina f79a152958 Makefiles: updated all makefiles adding clean functionality 2015-04-03 11:57:54 +03:00
Rejeesh Kutty a16ded55cf makefile: added 2015-04-01 16:30:04 -04:00
Adrian Costina 56374cf592 usdrx1: Added synchronization, updated constraints, added timing check for a5gt project 2014-10-29 19:29:42 +02:00
Adrian Costina 8934a66013 usdrx1: Update project so that the AD9671 cores can be synchronized 2014-10-13 17:06:40 +03:00
Rejeesh Kutty adf4893a27 usdrx1: remove constraints and other changes 2014-10-09 15:25:08 -04:00
Adrian Costina 2dfcb0c599 usdrx1: Initial commit for a5gt
axi_ad9671: added start of frame information to the altera core.
2014-10-07 19:41:54 +03:00