Commit Graph

7 Commits (0c614bab51a7c43f26bd885723f30970f8f6ff77)

Author SHA1 Message Date
AndreiGrozav 344ca6fc3d axi_pwm_gen: New features and fixes
New features:

1. External sync force the phase align. The external sync was used to align
   the phases of enabled pwms, but only after being armed by a
   load_config signal toggle.
   This feature lets the user decide between using load_config to
   arm and wait for a neg-edge of sync or automatic phase align trigger
   on the ext_sync neg-edge.
2. Force align. Lets the user chose between immediately stopping the
   active pulses and realigning them, or waiting for all running pulse
   periods end, before realigning.
3. Start at sync. When this feature is activated, the pulses will start immediately
   after the trigger event. Otherwise, each pulse will start after a period
   equal to the one for which it is set.
4. Use parameters to set the default status after reset of the
   - soft reset
   - start at sync
   - force align
   - ext sync align

Update regmap.

Fixes:

1. The polarity on disabled channels was staying high instead of low.
2. Fix 0 and 100 proc duty cycle configuration.

Signed-off-by: AndreiGrozav <andrei.grozav@analog.com>
Signed-off-by: Alin-Tudor Sferle <Alin-Tudor.Sferle@analog.com>
2024-04-19 15:23:55 +03:00
Alin-Tudor Sferle 119d4e43a3 axi_pwm_gen: Add support for 16 channels
Signed-off-by: Alin-Tudor Sferle <Alin-Tudor.Sferle@analog.com>
Signed-off-by: AndreiGrozav <andrei.grozav@analog.com>
2023-12-15 15:03:07 +02:00
Sergiu Arpadi 369e34425f axi_pwm_gen: Update timing constraints, hw.tcl and sdc files.
Not using util_cdc_constr.tcl
2023-03-30 14:55:59 +03:00
Jem Geronimo 2db944396f
axi_pwm_gen: add: intel support (#1080)
Signed-off-by: Jem Geronimo <johnerasmusmari.geronimo@analog.com>
2023-02-07 18:27:04 +08:00
Iulia Moldovan db94628cc6 library & projects: Update Makefiles
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
2023-01-27 11:54:05 +02:00
Adrian Costina 591a23156b Makefiles: Update header with the appropriate license 2021-09-16 16:50:53 +03:00
AndreiGrozav c235e5e583 axi_pwm_gen: Initial commit
axi_pwm_gen is based on util_pulse_gen, it introduces the option of
phase option between pulses(PWMs) and external synchronization.
Documentation available at
https://wiki.analog.com/resources/fpga/docs/axi_pwm_gen
2021-05-07 19:09:32 +03:00