Commit Graph

6 Commits (0c614bab51a7c43f26bd885723f30970f8f6ff77)

Author SHA1 Message Date
Iulia Moldovan 1cac2d82e1 Add copyright and license to .xdc files
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
2023-07-25 11:03:02 +03:00
Laszlo Nagy 0261eade0c zynq:all: fix SPI clock constraint
According to data sheets the EMIO SPI controller maximum frequency is
just 25MHz. Constrain the SPI clock accordingly.
2019-08-09 16:39:56 +03:00
Laszlo Nagy 5986e87a1f zynq/zynqmp: create a 50MHz clock on the SPI clock outputs of the PS 2019-05-30 14:55:11 +03:00
Laszlo Nagy bcba21da71 zcu102: updated IOSTANDARD of Bank 44 IOs to match VCCO 3.3V 2018-06-05 08:52:50 +01:00
Rejeesh Kutty f3f5353944 zcu102- updates 2016-05-10 15:40:41 -04:00
Rejeesh Kutty e8fbdd0f5d zcu102: zynq ultrascale 2016-05-10 15:40:41 -04:00