Commit Graph

8 Commits (0c614bab51a7c43f26bd885723f30970f8f6ff77)

Author SHA1 Message Date
Iulia Moldovan 1cac2d82e1 Add copyright and license to .xdc files
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
2023-07-25 11:03:02 +03:00
Laszlo Nagy 0261eade0c zynq:all: fix SPI clock constraint
According to data sheets the EMIO SPI controller maximum frequency is
just 25MHz. Constrain the SPI clock accordingly.
2019-08-09 16:39:56 +03:00
Laszlo Nagy 5986e87a1f zynq/zynqmp: create a 50MHz clock on the SPI clock outputs of the PS 2019-05-30 14:55:11 +03:00
Lars-Peter Clausen 6862655b0d Add .gitattributes file
Add .gitattributes file which sets up the eol encoding handling. This will
make sure that we get a uniform eol encoding across different operating
systems.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-06-26 11:07:10 +02:00
Lars-Peter Clausen f232a36141 common: Place HDMI interface registers into the IOB
The paths from the HDMI interface registers to the IO pads are
unconstrained. This means the P&R can in theory put the register anywhere
which could lead to stability issues on the interface, depending on what
else is in the fabric. To get predictable delays for the register to IO pad
path place the register into the IOB section.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2015-04-23 14:33:47 +02:00
Istvan Csomortani 5deffd57b1 zed: Remove top level constraints
Remove top level constraints from the ZED base design.
2014-10-20 13:20:27 +03:00
Adrian Costina a49eb5853b ZED, ZC702: Added contraints so that projects can successfully synthesize on linux systems
For ZC706 Fixed one constraint which was not correct
2014-08-26 16:28:41 +03:00
Rejeesh Kutty ddac1a8834 added common board files 2014-02-28 21:17:01 -05:00