c9a7d4d927
Add copyright and license to .tcl, .ttcl files
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Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
2023-07-25 15:22:26 +03:00
72313df81f
Updated the makefiles to build the projects in subdirectories based on the build parameters.
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Running 'make' will build the default project directly in the project folder (like it did before)
Running 'make RX_LANE_RATE=15 TX_LANE_RATE=15' will build the project inside the 'RXRATE15_TXRATE15' subdirectory.
Running 'make CFG=cfg/test_config.txt" will use the variables found inside the configuration file and build the project inside the 'test_config' subdirectory.
Running 'make clean' will clean the default project only.
Running 'make CFG=cfg/test_config.txt clean' will clean the 'testconfig' build.
Running 'make clean-all' will delete all the built configurations and libraries.
Note that the 'JESD' and 'LANE' words from the parameter names are stripped.
Signed-off-by: Bogdan Luncan <bogdan.luncan@analog.com>
2022-11-14 09:38:42 +02:00
482f0489a3
scripts: Merge adi_env.tcl into a single file
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Move the new adi_env.tcl file from hdl/projects/scripts into hdl/scrips
2022-08-08 13:52:54 +03:00
9093a8c428
library: Move ad_iobuf to the common library, as it's not Xilinx specific
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Updated all system_project and Makefiles
2020-11-02 16:13:35 +02:00
a589753d92
project/scripts: Rename adi_project.tcl to adi_project_xilinx.tcl
2019-06-29 06:53:51 +03:00
43725429ac
adi_project: Rename the process adi_project_xilinx to adi_project
2019-06-29 06:53:51 +03:00
085c0ed0da
fmcadc5: remove SYSREF from IOB
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The SYSREF for RX is generated internally,
disable the IOB attribute from it to avoid critical warnings.
2018-07-26 12:33:25 +03:00
3e565bc03c
fmcadc5: Disable constraints for jesd sysref in order to remove critical warning
2017-11-24 14:48:38 +02:00
c07fefcbd7
fmcadc5: Update to the ADI JESD interface
2017-11-20 15:12:47 +02:00
893af8d3e6
library & projects- ad_lvds/ad_data replace
2017-07-26 10:31:48 -04:00
b7ca17f02b
scripts: Change adi_project_create to adi_project_xilinx for creating xilinx projects
2017-06-07 12:06:50 +03:00
75c7525c60
fmcadc5- remove psync module
2017-04-27 13:29:06 -04:00
e4e5b30ade
fmcadc5: Integrate ad_sysref_gen into the project
2017-01-03 13:52:39 +02:00
11b57290f1
fmcadc5- replaced with axi_adxcvr
2016-11-23 16:22:05 -05:00
df36902713
lib_refactoring: Fix path of the IO macros
2016-08-08 15:07:19 +03:00
be74db656c
ad6674evb, fmcadc2, fmcadc4, fmcadc5, fmcjesdadc1:
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Update system_project.tcl scripts to correctly select the necessary
constraint files
2016-05-04 19:37:33 +03:00
9104b2cc60
ad6676evb, fmcadc2, fmcadc4, fmcadc5,...
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ad6676evb, fmcadc2, fmcadc4, fmcadc5, fmcjesdadc1: Remove unused
set_proprieties
2016-05-04 19:13:25 +03:00
cafc80c829
fmcadc5: add programmable io delay
2015-11-02 12:10:18 -05:00
08777ca566
fmcadc5- latest board changes
2015-10-15 10:46:07 -04:00
624d2778d8
fmcadc5: 2014.4 updates
2015-03-23 10:00:46 -04:00
19e4950b72
renamed to match official names
2014-12-08 10:44:15 -05:00
Iulia Moldovan
Bogdan Luncan
Iacob_Liviu
Adrian Costina
Istvan Csomortani
Laszlo Nagy
Rejeesh Kutty
AndreiGrozav