* Removed empty/commented lines * Regenerated Makefiles * Removed redundancies adc channels data width * Set data width 32-bit: max resolution and CRC header Signed-off-by: laurent-19 <laurentiu.popa@analog.com>
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
Because the inferface signals which pass through the eval board's Arduino connector are connected to level shifters the design will not work at the maximum clk frequency of 48MHz. The maximum tested frequency is 24MHz.
laurent-19
Iulia Moldovan
sergiu arpadi