3 Commits (151781a2af1006a6a9e077c6c82ffc6691625483)

Author	SHA1	Message	Date
Istvan Csomortani	d5f4991e26	ad9434: Merge the ad9434_if interface data outputs into one single bus	2014-09-25 16:45:12 +03:00
Istvan Csomortani	079ed0ffb3	ad_serdes_in: Update the serdes_in module ... Add additional IDELAY block before the ISERDES. Delet the IDDR blocks. Be aware, the ISERDES block are running in DDR mode. If the interface is SDR the maximum parallel data width is 4.	2014-09-25 16:40:29 +03:00
Istvan Csomortani	683561b67d	AD9434: Initial check in of the library and project with ZC706	2014-09-24 18:27:17 +03:00