2 Commits (15c5bc7012c26d21b876c77a5cded10c8258fe32)

Author	SHA1	Message	Date
Istvan Csomortani	7be017baa3	daq1: Add AXI PLDDR FIFO to the receive path ... The AD9684 has two 500 MSPS converter, the system can not handle this throughput without a FIFO.	2016-07-07 07:15:54 +03:00
Istvan Csomortani	ee752ec08a	daq1: Initial commit	2014-09-01 18:34:31 +03:00