c1bdfca4c3
library: Delete all adi_ip_constraint process call
2017-04-06 12:36:47 +03:00
ac2e5a9dac
constraints: Update constraints
...
Xilinx recommends that all synchronizer flip-flops have
their ASYNC_REG property set to true in order to preserve the
synchronizer cells through any logic optimization during synthesis
and implementation.
2017-02-24 13:43:32 +02:00
8ebc8fe4e2
updated makefiles
2016-12-09 23:06:41 +02:00
025420d6f8
library/axi_xcvrlb- xcvr changes
2016-11-23 12:00:13 -05:00
bf949f1a88
axi_xcvrlb- xcvr updates
2016-10-17 16:16:57 -04:00
21b5e9c634
hdlmake- updates
2016-09-21 11:56:03 -04:00
0def596b43
axi_xcvrlb- updates
2016-09-21 11:04:22 -04:00
d497a7b0ae
axi_xcvrlb- constraints
2016-09-21 11:04:22 -04:00
1860d72df6
axi_xcvrlb- updates
2016-09-19 12:39:59 -04:00
5592c2780e
axi_xcvrlb- loopback version
2016-09-19 12:39:59 -04:00
Istvan Csomortani
Adrian Costina
Rejeesh Kutty