The ILA can not work at 250MHz on ZED/ZC702. Because of this, the data
path was modified from 28bits@250MHz to 56bits@125MHz, by using a FIFO.
The ZED/ZC702 max BUFG frequency is 464MHz, which corresponds to a 2.16
period so the constraints were modified accordingly.
ZC702: Removed invalid address segments. Changed the constraints
for adc_clk to minimum possible value in order to meet timing.
ZED: Change the constraints for adc_clk to minimum possible value, in
order to meet timing
AXI_AD9643: Corrected the number of bits in the adc_mon_data bus