07217740b5
imageon: Increase HDMI RX clock constraint
...
The ADV7611 is rated for a maximum clock rate of 165MHz. Increase the clock rate constraint to match this.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-11-29 14:12:39 +01:00
284fbac571
usdrx1: Xcvr updates, so that the channel parameters are correctly configured from boot time
2016-11-28 14:16:07 +02:00
45fd4f806d
fmcjesdadc1: Fixed RX_PMA_CFG parameter
2016-11-25 16:33:58 +02:00
609b01f9e4
util_clkdiv: Added division by 2 option
2016-11-24 16:01:37 +02:00
91ee4394e4
axi_intr_monitor: Initial commit
2016-11-24 15:19:36 +02:00
f03675cdab
axi_dmac: ID_WIDTH must be clog2(FIFO_SIZE*2)
2016-11-24 13:20:45 +02:00
c705623101
axi_dmac: Fix port connection and port width mismatch
2016-11-24 12:01:45 +02:00
11b57290f1
fmcadc5- replaced with axi_adxcvr
2016-11-23 16:22:05 -05:00
22e230618c
scripts/adi_board.tcl- support multiple xcvrs
2016-11-23 16:22:05 -05:00
862bd7ef2c
daq3/zc706- xcvr changes
2016-11-23 15:02:20 -05:00
4e3e623530
pzsdr2/ccpci- updates
2016-11-23 14:02:59 -05:00
025420d6f8
library/axi_xcvrlb- xcvr changes
2016-11-23 12:00:13 -05:00
e5d3bae54d
projects/ad6676-adrv9371: xcvr updates
2016-11-23 11:06:22 -05:00
daa3df4b96
projects/- xcvr updates
2016-11-22 16:23:05 -05:00
8f562fd069
xcvr updates- board procedure
2016-11-22 14:43:36 -05:00
b1a9bd96f1
daq2: xcvr pll changes
2016-11-22 12:53:29 -05:00
750b23621b
board-tcl: xcvr qpll/cpll changes
2016-11-22 12:53:02 -05:00
2ea997c3d5
interfaces- remove channel based pll reset
2016-11-22 11:34:29 -05:00
3dbed492b3
util_adxcvr: expose cpll/qpll as it is
2016-11-22 11:32:37 -05:00
3cbe735bd8
util_adxcvr: regenerate from script
2016-11-22 11:21:04 -05:00
c57ffc9364
axi_adxcvr- separate pll reset from channels
2016-11-22 11:12:54 -05:00
b9795c7033
xilinx/util_adxcvr: Update enablement dependencies
2016-11-22 17:33:40 +02:00
4ed7469286
fmcadc4/zc706- updates
2016-11-22 10:32:05 -05:00
8c4279f618
pzsdr1: Added ccusb_lvds initial project
2016-11-22 16:58:34 +02:00
3d0049d274
pzsdr2: ccusb_lvdsr, updated project for the latest schematic
2016-11-22 16:55:52 +02:00
aff45eae5f
fmcadc2: xcvr updates
2016-11-21 18:45:38 +02:00
69ee410d3d
fmcomms2/zc706pr- bypass pr as default
2016-11-21 09:45:10 -05:00
4739d05269
zc706pr/common- removed
2016-11-18 14:52:39 -05:00
f43248c2bc
common/pzsdr*- removed
2016-11-18 11:32:43 -05:00
2f2570fcac
axi_i2s: Remove incorrectly inferred interfaces
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Remove interfaces that were incorrectly inferred by the tools.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-11-18 15:01:29 +01:00
43c74bf55c
axi_i2s: Tie-off optional inputs
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Tie-off all optional inputs to 0 so that they are driven to a defined value
when not used.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-11-18 15:01:26 +01:00
26907ef1fd
axi_i2s: Remove duplicated clock interface association
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The I2S interface has a clock associated to it twice, this will generate a
critical warning when using the core, so remove one of them.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-11-18 15:01:24 +01:00
0d75bcb606
pzsdr2: ccbox: Use DMA interface 0+1 for audio
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There is a bug in the ps7 component specification that causes critical
warnings to appear in the build log if DMA interface 0 is disabled, but any
other DMA interface is enabled.
Work around this issue by using DMA interface 0 and 1 instead of 1 and 2
for the I2S DMA.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-11-18 14:03:46 +01:00
b62f60b0da
pzsdr1/ccbox- updates
2016-11-17 16:14:28 -05:00
935f8a5c7b
pzsdr1/ccbox- constraints
2016-11-17 16:13:53 -05:00
4f65bcb3b2
pzsdr1/ccbrk_cmos- updates
2016-11-17 15:32:49 -05:00
e85dd2740a
pzsdr1/ccbrk_lvds- updates
2016-11-17 15:32:25 -05:00
a61da1d2ac
pzsdr1/common- updates
2016-11-17 15:31:25 -05:00
aa02ca875f
pzsdr1- common files
2016-11-17 13:40:25 -05:00
8c25402d53
pzsdr1- common files
2016-11-17 13:40:04 -05:00
4dae754287
pzsdr1- added readme
2016-11-17 11:29:01 -05:00
778638a7a1
pzsdr2- make updates
2016-11-17 10:26:45 -05:00
74bf4dfb80
pzsdr2- gpio- turn-around
2016-11-17 10:24:50 -05:00
d0166a4c7e
ccbox- updates
2016-11-17 10:24:11 -05:00
c2b7cbd61b
ccbox- constraints
2016-11-17 10:23:51 -05:00
5e6b931150
ccbox- added
2016-11-17 09:28:33 -05:00
fb5d36b250
pzsdr2- update ccfmc
2016-11-16 16:27:41 -05:00
95c44b687e
pzsdr2- fmc/pci constraints
2016-11-16 16:27:41 -05:00
11347c49be
fmcomms11- device set to -3
2016-11-16 13:43:07 -05:00
b85a282748
fmcomms11- lane swap
2016-11-16 10:26:47 -05:00
Lars-Peter Clausen
Adrian Costina
Istvan Csomortani
Rejeesh Kutty
AndreiGrozav