dd7bac41c1
daq1 : Update project to 2014.2
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- Cores are upadted
- Concat module does not swap output anymore
- Clock signal name ps7_clk_* changed to clk_fpga_*
2014-09-22 17:33:50 +03:00
fb5d212370
daq2/kcu105: fixed timing violations
2014-09-19 15:55:42 -04:00
a3dbd5ac00
projects/common/vc707/vc707_system_bd: AD9625_FMC update to 2014.2
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Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-09-16 14:59:36 +02:00
41cc92ef49
Remove BASEADDR/HIGHADDR parameters
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This is unused and unneeded. The AXI interconnect will make sure that a
peripheral only gets requests that are meant for it, there is no need to
check the address in the peripheral itself.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-09-11 12:26:37 +02:00
647a26e19c
projects/common/vc707/vc707_system_bd.tcl: Select Linux MMU settings
2014-09-10 17:40:36 +02:00
50faf0c53a
Remove executable flags from non-exectuable files
2014-09-09 15:05:06 +02:00
b58e425b44
daq2/kcu105: timing improvement -register slices hang
2014-09-08 10:24:56 -04:00
72f31370ef
a5gt: ethernet-fpga lvds mode
2014-09-04 11:19:25 -04:00
3deb55bb98
a5gt: ethernet i/o changed to lvds
2014-09-04 11:19:24 -04:00
5a42c10233
projects/fmcomms2/c5soc: Added video output. HPS SPI was replaced by 3 Wire SPI.
2014-08-27 21:46:23 +03:00
7b280b3bbf
fmcomms6: zc706 build-only version
2014-08-27 10:44:37 -04:00
a49eb5853b
ZED, ZC702: Added contraints so that projects can successfully synthesize on linux systems
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For ZC706 Fixed one constraint which was not correct
2014-08-26 16:28:41 +03:00
cb29b83b05
a5gt: updates to match a5gt
2014-08-25 10:46:59 -04:00
b481df0b5f
library: local constraints async groups
2014-08-14 15:09:51 -04:00
39bb7ca231
a5soc: fmcjesdadc1+hdmi version
2014-08-14 09:05:38 -04:00
96969079ce
a5soc: fixes for 14.0 and spi conflicts
2014-08-11 16:46:37 -04:00
6c6cab0e16
fmcomms2: ZC706 modified constraints for linux build machines
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The added constraints allow the project to successfully pass timing on some ubuntu or debian build machines.
2014-08-01 17:34:36 +03:00
663588eeaf
daq2/kcu105: working ddr version
2014-07-29 09:15:30 -04:00
db2386a351
daq2/kcu105: latest mig updates
2014-07-23 16:25:55 -04:00
db1c931736
ad9625_plddr: PL DDR3 fixes
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- Modified the axi slave interface handler
- Increased the rfifo_mem input depth to prevent overflow
2014-07-23 19:34:44 +03:00
2b6ce1e504
zc706_plddr3 : Fix axi_fifo2s_axi_mrst net
2014-07-21 15:10:36 +03:00
2955b9db78
fifo2s: flush if no request, c5soc: 14.0
2014-07-15 16:25:33 -04:00
b434fe6dd5
fmcomms5: register map changes
2014-07-08 16:57:43 -04:00
c75e6b3043
kcu105 pwr-good removed
2014-07-07 09:56:13 -04:00
a388ccab0a
fmcomms2/c5soc: initial checkin
2014-07-02 14:56:00 -04:00
c1b7fc17f5
c5soc: initial a5soc copy
2014-07-01 13:05:26 -04:00
e38813fa9f
fifo- monitor status signals
2014-06-25 12:15:13 -04:00
57bb3705f2
zc706-plddr3: read changes to lower dma clock
2014-06-25 09:20:58 -04:00
6ea7dd7fc3
kcu105: pwr-good added
2014-06-12 15:22:31 -04:00
2837d788a6
mitx045: Added I2S core to the base design
2014-06-06 17:53:47 +03:00
cf56a568c6
kcu105: GTH updates
2014-06-05 14:27:38 -04:00
45325b7c0d
mitx045: minor changes in common and ADV7511 projects
2014-06-03 19:24:12 +03:00
c52327d0c6
common,adv7511: Added mitx045 platform.
2014-06-02 11:08:03 +03:00
877b81a373
ad9625/vc707: working version
2014-05-30 15:07:23 -04:00
c789dce77e
ad9625/zc706: added pl ddr3 fifo changes
2014-05-29 12:59:29 -04:00
56ddce1e8c
dmac: create fifo interface to avoid being treated as axi control stream
2014-05-27 10:25:14 -04:00
f73819f4d4
zc706: pl ddr3 initial checkin
2014-05-13 16:19:53 -04:00
c5b3dd3643
vc707 base : tcl update
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- Added missing address space
- Connect the sys_audio_clkgen/reset
2014-05-08 12:30:25 +03:00
3ac1da178e
kcu105: sane except for ddr4/ethernet
2014-05-06 15:39:05 -04:00
53af7f3c1f
ml605: initial checkin
2014-05-05 11:20:26 -04:00
4d4f66fbdd
a5soc: increase pipeline for qsys
2014-05-04 10:38:53 -04:00
a10043c4f4
kcu105: base complete with ethernet errors
2014-04-30 14:41:43 -04:00
9900a56fa5
kcu105: initial checkin
2014-04-30 14:41:37 -04:00
0b1ce14842
a5soc: basic hardware build
2014-04-30 12:40:27 -04:00
99d66e7580
a5soc: initial-copy version
2014-04-30 12:40:26 -04:00
fbfd658f0d
zc706: added pl ddr3 mig
2014-04-09 15:58:12 -04:00
04ab34c8ed
a5gt: ethernet assignments
2014-04-03 20:50:16 -04:00
d0a8b4a63c
kc705,common: Mem_interconnect maximize performance
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For FMCOMMS1, when both the ADC and DAC DMAs are active, the system was
unstable. With this fix, it the system seems to be stable.
2014-04-03 15:59:33 +03:00
0d678b89ed
altera a5gt fmcjesdadc1 setup
2014-04-01 11:46:37 -04:00
fbafaa8507
MicroBlaze base system: Fix a few net names
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Every interconnect interface net name follows the convention:
<interconnect name>_<interface name>
No changes in logic or any connection!
2014-04-01 10:40:35 +03:00
Istvan Csomortani
Rejeesh Kutty
Michael Hennerich
Lars-Peter Clausen
dbogdan
Adrian Costina