Commit Graph

21 Commits (1a11e28821223f3d61aa14094eedff6fe80983ec)

Author SHA1 Message Date
Rejeesh Kutty 21b5e9c634 hdlmake- updates 2016-09-21 11:56:03 -04:00
Rejeesh Kutty 0def596b43 axi_xcvrlb- updates 2016-09-21 11:04:22 -04:00
Rejeesh Kutty d497a7b0ae axi_xcvrlb- constraints 2016-09-21 11:04:22 -04:00
Rejeesh Kutty 1860d72df6 axi_xcvrlb- updates 2016-09-19 12:39:59 -04:00
Rejeesh Kutty 5592c2780e axi_xcvrlb- loopback version 2016-09-19 12:39:59 -04:00
Istvan Csomortani 38f1521861 xilinx/ad_serdes_in : Fix some typos 2016-09-19 16:02:52 +03:00
Istvan Csomortani ff0f659a33 xilinx/ad_serdes_clk : Rename parameter MMCM_DEVICE_TYPE to DEVICE_TYPE 2016-09-19 16:02:06 +03:00
Istvan Csomortani 6510f92c12 ad_serdes : Cosmetic changes 2016-09-16 14:45:39 +03:00
Rejeesh Kutty a2d15acb89 ad_serdes- altera/xilinx sync 2016-09-15 13:33:55 -04:00
Istvan Csomortani 3b0c1e02fc axi_dacfifo: Move IP to library/xilinx 2016-09-15 11:38:16 +03:00
Istvan Csomortani 3cbbc771a8 axi_adcfifo: Move IP to library/xilinx 2016-09-15 11:36:47 +03:00
Shrutika Redkar 10b9a0e52f upadated xcvr ips 2016-08-17 15:51:55 -04:00
Rejeesh Kutty 3427965cd2 adxcvr- add u-gth bufg 2016-08-11 10:00:41 -04:00
Shrutika Redkar 829e4155ca modified transceiver configuration files 2016-08-10 14:59:38 -04:00
Istvan Csomortani 1d33d7d7ee lib_refactoring: Move the CMOS interface modules to ~/library/xilinx/common 2016-08-08 15:07:42 +03:00
Istvan Csomortani b806fa3b42 lib_refactoring: Move all the Xilinx common modules to library/xilinx/common 2016-08-08 15:06:10 +03:00
Adrian Costina 5faf4c4976 cleanup: Don't need Makefiles specific to xilinx/altera libraries. Top Makefile covers them 2016-08-05 16:27:52 +03:00
Adrian Costina d60bce654c Makefiles: Updated Makefiles so they run correctly with gnuwin32 tools 2016-08-05 15:16:04 +03:00
Rejeesh Kutty cb23ba8bb7 make- script needs update 2016-08-04 14:17:04 -04:00
Rejeesh Kutty e42b4ea378 hdlmake- updates 2016-08-04 13:28:25 -04:00
Rejeesh Kutty 2b7c976be5 xcvr- altera/xilinx split 2016-08-04 13:26:10 -04:00