Commit Graph

3505 Commits (1ef064ac039cbeae17f46d2b8772cfec0241d8ef)

Author SHA1 Message Date
Istvan Csomortani 122667259f ad7616_sdz: Update Make file 2016-01-28 14:48:44 +02:00
Istvan Csomortani 118577f64f ad7616_sdz: Add support for parallel interface 2016-01-28 12:38:22 +02:00
Istvan Csomortani fbb0d368bf axi_ad7616: Add support for parallel interface 2016-01-28 12:37:22 +02:00
Rejeesh Kutty 170295161f pzsdr1- xdc 2016-01-26 11:19:00 -05:00
Istvan Csomortani cd43ebd8bc axi_ad7616: The OP_MODE parameter is no longer required 2016-01-26 11:05:33 +02:00
Rejeesh Kutty bcac3eef4d pzsdr1- initial commit 2016-01-25 16:07:33 -05:00
Rejeesh Kutty 44a382fc69 pzsdr1-added 2016-01-25 15:33:34 -05:00
Istvan Csomortani 2a17ce275c axi_ad7616: Control inputs are controlled through GPIO
The following control inputs are controlled through GPIO: reset_n, seq_en, hw_rngsel, chsel, crcen, burst and os.
2016-01-25 17:50:50 +02:00
Istvan Csomortani e22d5d5c18 daq2: Fix clock constraints for KC705 and VC707 2016-01-22 19:09:57 +02:00
Adrian Costina 59fbd99fdb fmcjesdadc1: Added clock constraint for the ADC path 2016-01-22 15:46:20 +02:00
Adrian Costina dca39c26f9 ad6676evb: Added clock constraint for the ADC path 2016-01-22 15:45:16 +02:00
Adrian Costina 9cd0378003 fmcadc2: Added clock constraint for the ADC path 2016-01-22 15:44:04 +02:00
Istvan Csomortani aa77af6bdf daq1_cpld: Add ISE project file
This file, along with the project source files, is sufficient to open and implement in ISE Project Navigator.
2016-01-21 18:05:59 +02:00
Istvan Csomortani 4b962e8d72 spi_engine: The width of the counters depend on the current DATA_WIDTH 2016-01-20 15:44:06 +02:00
Istvan Csomortani 4cc69c0cac axi_ad9684: Add Makefile 2016-01-19 18:32:11 +02:00
István Csomortáni c865dbf353 axi_ad9680: Fix channel instantiation 2016-01-19 12:49:45 +02:00
István Csomortáni df3eefdca1 axi_ad9434: Update constraint file 2016-01-19 12:43:05 +02:00
Istvan Csomortani 14f7027793 ad7616_sdz: Move the context switching to system_project.tcl 2016-01-19 11:34:28 +02:00
Istvan Csomortani 8c69c9d2ce daq1_zc706 : Update the project
+ Add AD9684 to the block design
+ Update the IO definitions
+ Update the CPLD design
+ Add 3wire SPI logic
2016-01-19 11:20:35 +02:00
Istvan Csomortani d1e638349b ad_serdes_clk : The reference clock selection line should by tied to 1
Just the CLKIN1 is used in the MMCM.
2016-01-19 11:18:00 +02:00
Istvan Csomortani c6cfd1a2b6 axi_ad9684: Initial check in 2016-01-19 11:13:45 +02:00
István Csomortáni ab99c4456a ad9434_fmc: Delete unnecessary set_property call
HPx interface is activated by the ad_mem_hpx_interconnect process
2016-01-14 15:41:23 +02:00
Lars-Peter Clausen c094ab8b52 cn0363: Add support for the MicroZed
Add support for connecting the CN0363 to the MicroZed. This works in
combination with the MicroZed Arduino carrier board. The CN0363 needs to be
connected to the PLPMOD header.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-01-13 20:32:26 +01:00
Lars-Peter Clausen 514eb68876 cn0363: Factor out common parts
Factor out the common parts of the cn0363 design so we can use it to add
support for other carriers.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-01-13 20:32:26 +01:00
Lars-Peter Clausen d2b26720e6 common: microzed: Add clock, reset and interrupt support
In order for the base project to be usable by other projects it needs to
create the clock, reset and interrupt signals that are expected to exist.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-01-13 20:32:26 +01:00
Lars-Peter Clausen 51d20b1a61 adi_project.tcl: Add MicroZed support
Handle the projects for the MicroZed and set up the FPGA part accordingly.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-01-13 20:32:26 +01:00
Lars-Peter Clausen 426490c394 common: Rename uzed to microzed
Everybody calls the MicroZed microzed in their projects. Don't deviate from
that to avoid potential confusion.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2016-01-13 20:18:57 +01:00
István Csomortáni 4f2b999999 axi_ad9680: Q_OR_I_N is not used in this channel 2016-01-13 16:26:22 +02:00
István Csomortáni 838b558176 axi_ad9434: Fix adc_status
adc_status was not driven by anything. Should be driven by adc_status_m1.
2016-01-13 12:21:42 +02:00
István Csomortáni 2dcd9136aa axi_ad6676: Delete confusing comment 2016-01-13 10:20:18 +02:00
Rejeesh Kutty c397787001 uzed: updates 2016-01-11 15:36:01 -05:00
Rejeesh Kutty a610ebb413 uzed: zed-copy 2016-01-11 13:53:22 -05:00
Istvan Csomortani 02cc926275 daq1: Add CPLD logic and IO constraints 2016-01-04 18:10:46 +02:00
Adrian Costina 7013b319b0 motcon2_fmc: Fixed reset connection for cpack cores 2015-12-22 12:03:34 +02:00
Istvan Csomortani c29dd8fad5 axi_ad7616: Fix Makefile 2015-12-21 19:39:58 +02:00
Istvan Csomortani 0b55325db9 axi_ad7616: Fix IP packaging script 2015-12-21 19:39:14 +02:00
Istvan Csomortani 17e7d1b86f ad7616: Add Makefiles 2015-12-21 17:09:42 +02:00
Rejeesh Kutty 2bb19be3d3 pzsdr/ccfmc: sfp io control 2015-12-17 16:18:06 -05:00
Rejeesh Kutty f3fe16a102 pzsdr/ccfmc: camera/sfp pin changes 2015-12-17 16:17:24 -05:00
Rejeesh Kutty ea045a3f9a fmcadc4: change qpll to receive 2015-12-17 12:34:47 -05:00
Rejeesh Kutty 40ab2f5e6a ccfmc: tdd/gpio bit moved to the top 2015-12-17 11:37:57 -05:00
Adrian Costina 34b832e22a fmcomms6: Fixed reset connection for cpack core 2015-12-16 10:36:33 +02:00
Adrian Costina 35f6bd16e9 fmcomms5: Fixed reset connection for cpack core 2015-12-16 10:34:36 +02:00
Rejeesh Kutty 83fd4a53a7 daq3/kcu105: updates 2015-12-14 09:29:48 -05:00
Rejeesh Kutty 07316a905e daq3/a10gx: sysref is lvds 2015-12-14 09:29:10 -05:00
Istvan Csomortani ee4d5af12e ad7616_sdz: Update the project
+ Fix system_top.v
+ Finish up the common block design
+ Fix system_project.tcl
2015-12-14 16:02:38 +02:00
Istvan Csomortani 8ae9de8fba axi_ad7616: Update core
+ Both the data width and number of SDI lines are configurable
+ SER1W line is hardware configurable, it was removed from the IP
+ Add 'Hardware mode' support for the controller
2015-12-14 16:00:56 +02:00
Istvan Csomortani 4e57170384 spi_engine: Update SPI Engine frame work
+ data width and number of SDI lines are configurable
+ axi_spi_engine module can have two different type of memory map interface (S_AXI or UP)
2015-12-14 15:57:54 +02:00
Istvan Csomortani 29a0f27cd1 ad_edge_detect: Add a flop to output, reset is active high 2015-12-14 15:40:29 +02:00
Istvan Csomortani f4e3523390 ad7616_sdz: Update IO constraints 2015-12-14 15:34:56 +02:00