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21 Commits (215edb11c6a67a17c175b4f91e088a0b44dc7907)

Author SHA1 Message Date
Adrian Costina 40fb68dfd5 ad9265, ad9434, ad9467, daq1, daq2, daq3, fmcadc2, fmcadc4, fmcadc5, fmcjesdadc1, fmcomms6, fmcomms7, usdrx1: updated common spi module so that spi streaming is possible 2016-03-02 13:39:37 +02:00
Istvan Csomortani 4b115fbe69 ad9467_fmc: Delete ILA from the design 2015-09-25 17:41:46 +03:00
Lars-Peter Clausen 1c603b830e ad9467_fmc: Drop explicit axi_dmac clock synchronicity configuration 
The axi_dmac core is now capable of detecting whether its different parts
run in different clock domains or not. No need to configure it manually any
more.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2015-09-18 15:27:47 +02:00
Istvan Csomortani d52308f074 axi_dmac: Change parameter name 2D_TRANSFER 
Parameter name can't start with numbers, 2D_TRANSFER was changed to DMA_2D_TRANSFER
 2015-08-20 10:14:22 +03:00
Istvan Csomortani 57cfb7cfb1 hdl/library: Update the IP parameters 
The following IP parameters were renamed:

PCORE_ID --> ID
PCORE_DEVTYPE --> DEVICE_TYPE
PCORE_IODELAY_GROUP --> IO_DELAY_GROUP
CH_DW --> CHANNEL_DATA_WIDTH
CH_CNT --> NUM_OF_CHANNELS
PCORE_BUFTYPE --> DEVICE_TYPE
PCORE_ADC_DP_DISABLE --> ADC_DATAPATH_DISABLE
CHID --> CHANNEL_ID
PCORE_DEVICE_TYPE --> DEVICE_TYPE
PCORE_MMCM_BUFIO_N --> MMCM_BUFIO_N
PCORE_SERDES_DDR_N --> SERDES_DDR_N
PCORE_DAC_DP_DISABLE --> DAC_DATAPATH_DISABLE
DP_DISABLE --> DATAPATH_DISABLE
PCORE_DAC_IODELAY_ENABLE --> DAC_IODELAY_ENABLE
C_BIG_ENDIAN --> BIG_ENDIAN
C_M_DATA_WIDTH --> MASTER_DATA_WIDTH
C_S_DATA_WIDTH --> SLAVE_DATA_WIDTH
NUM_CHANNELS --> NUM_OF_CHANNELS
CHANNELS --> NUM_OF_CHANNELS
PCORE_4L_2L_N -->QUAD_OR_DUAL_N
C_ADDRESS_WIDTH --> ADDRESS_WIDTH
C_DATA_WIDTH --> DATA_WIDTH
C_CLKS_ASYNC --> CLKS_ASYNC
PCORE_QUAD_DUAL_N --> QUAD_DUAL_N
NUM_CS --> NUM_OF_CS
PCORE_DAC_CHANNEL_ID --> DAC_CHANNEL_ID
PCORE_ADC_CHANNEL_ID --> ADC_CHANNEL_ID
PCORE_CLK0_DIV --> CLK0_DIV
PCORE_CLK1_DIV --> CLK1_DIV
PCORE_CLKIN_PERIOD --> CLKIN_PERIOD
PCORE_VCO_DIV --> VCO_DIV
PCORE_Cr_Cb_N --> CR_CB_N
PCORE_VCO_MUL --> VCO_MUL
PCORE_EMBEDDED_SYNC --> EMBEDDED_SYNC
PCORE_AXI_ID_WIDTH --> AXI_ID_WIDTH
PCORE_ADDR_WIDTH --> ADDRESS_WIDTH
DADATA_WIDTH --> DATA_WIDTH
NUM_OF_NUM_OF_CHANNEL --> NUM_OF_CHANNELS
DEBOUNCER_LEN --> DEBOUNCER_LENGTH
ADDR_WIDTH --> ADDRESS_WIDTH
C_S_AXIS_REGISTERED --> S_AXIS_REGISTERED
Cr_Cb_N --> CR_CB_N
ADDATA_WIDTH --> ADC_DATA_WIDTH
BUFTYPE --> DEVICE_TYPE
NUM_BITS --> NUM_OF_BITS
WIDTH_A --> A_DATA_WIDTH
WIDTH_B --> B_DATA_WIDTH
CH_OCNT --> NUM_OF_CHANNELS_O
M_CNT --> NUM_OF_CHANNELS_M
P_CNT --> NUM_OF_CHANNELS_P
CH_ICNT --> NUM_OF_CHANNELS_I
CH_MCNT --> NUM_OF_CHANNELS_M
4L_2L_N --> QUAD_OR_DUAL_N
SPI_CLK_ASYNC --> ASYNC_SPI_CLK
MMCM_BUFIO_N --> MMCM_OR_BUFIO_N
SERDES_DDR_N --> SERDES_OR_DDR_N
CLK_ASYNC --> ASYNC_CLK
CLKS_ASYNC --> ASYNC_CLK
SERDES --> SERDES_OR_DDR_N
GTH_GTX_N --> GTH_OR_GTX_N
IF_TYPE --> DDR_OR_SDR_N
PARALLEL_WIDTH --> DATA_WIDTH
ADD_SUB --> ADD_OR_SUB_N
A_WIDTH --> A_DATA_WIDTH
CONST_VALUE --> B_DATA_VALUE
IO_BASEADDR --> BASE_ADDRESS
IO_WIDTH --> DATA_WIDTH
QUAD_DUAL_N --> QUAD_OR_DUAL_N
AXI_ADDRLIMIT --> AXI_ADDRESS_LIMIT
ADDRESS_A_DATA_WIDTH --> A_ADDRESS_WIDTH
ADDRESS_B_DATA_WIDTH --> B_ADDRESS_WIDTH
MODE_OF_ENABLE --> CONTROL_TYPE
CONTROL_TYPE --> LEVEL_OR_PULSE_N
IQSEL --> Q_OR_I_N
MMCM --> MMCM_OR_BUFR_N
 2015-08-19 14:11:47 +03:00
Istvan Csomortani 47469ad375 ad9434/ad9467 : Connect reset signal for AXI streaming interface of the device dma 2015-06-04 18:09:48 +03:00
Istvan Csomortani 1819a41ab5 ad9467_zed: Update project to the new framework. 2015-04-01 14:38:39 +03:00
Istvan Csomortani a3e73a1837 ad9467_fmc: Fix port names at ILA logic 
In the version 2014.2 the output port of a constant module was changed from 'const' to 'dout'.
This commit fix the non working ILA.
 2015-03-11 14:45:02 +02:00
Istvan Csomortani a6b7b9d880 ad9467_kc705: Fix memory segment offset for SEG_axi_ddr_cntrl 2014-12-09 16:20:39 +02:00
Lars-Peter Clausen 3c85c7e2f8 ad9467_fmc: Set ila type to native 
With version 4.0 ila defaults to the AXI monitor type, so explicitly
configure it for native.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 2014-12-01 13:44:08 +01:00
Istvan Csomortani 83c2eefea2 ad9467_fmc: Update interrupts 2014-11-24 18:23:28 +02:00
Istvan Csomortani 114406335d ad9467_fmc: Connect dma controller directly to the HP port 2014-11-24 18:23:27 +02:00
Istvan Csomortani 17675863e0 all_projects: Fix the interrupt connections to preserve IRQ layout 2014-10-22 11:48:08 +03:00
Istvan Csomortani b3c784f76a ad9467_fmc: Made some cosmetic changes on the block design script. 2014-10-20 13:28:34 +03:00
Paul Cercueil 7659f3438c AD9467: Fixup swapped net names 
Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
 2014-10-10 12:33:07 +03:00
Istvan Csomortani 072e11c661 ad9467_fmc: Upgrade the axi_quad_spi core 2014-10-08 15:22:58 +03:00
Istvan Csomortani fc38249150 ad9467 ZED: Fix over range signal path, and the dma interface. 2014-10-08 11:24:44 +03:00
Istvan Csomortani 15db557bd6 ad9467 ZED: Cosmetic changes on bd script. 2014-10-08 11:24:32 +03:00
Istvan Csomortani 82717b354a ad9467_fmc : Upgrade project to 2014.2 2014-10-08 11:21:43 +03:00
Istvan Csomortani b2d0260130 ad9467_fmc: Prevent to use concatenation module on SPI interface 
This module cause unnecessary issues during version upgrades.
 2014-10-08 11:20:45 +03:00
Istvan Csomortani e73952a694 ad9467 : initial checkin 2014-04-09 17:34:40 +03:00