Rejeesh Kutty
a2607a8057
fmcadc4: fifo updates
2014-12-09 10:38:47 -05:00
Istvan Csomortani
2e4640d5c5
ad9467_kc705: Fix memory segment offset for SEG_axi_ddr_cntrl
2014-12-09 16:17:46 +02:00
Istvan Csomortani
c4152627f0
plddr3: Sync adc_wcnt_int to adc_wr and fix adc_dwr pulse width
...
The adc_wcnt_int must be synchronized to adc_wr. The adc_dwr signal pulse width was to long,
it needs to be just one adc_clk cycle.
2014-12-09 13:59:19 +02:00
Istvan Csomortani
a0d5e7862e
ad9467_kc705: Fix typos.
2014-12-09 12:07:49 +02:00
Istvan Csomortani
915ee7a268
fmcjesdadc1_kc705: Connect the SPI interrupt to the controller
2014-12-09 11:54:16 +02:00
Istvan Csomortani
ee04eb637b
ad9467_kc705: Fix interrupts
2014-12-09 11:54:08 +02:00
Adrian Costina
6aad2fbbb2
axi_hdmi_tx: Fixed typo in altera related core
2014-12-09 10:19:03 +02:00
Rejeesh Kutty
abff7097f6
daq3: compilation fixes - latest changes
2014-12-08 14:50:03 -05:00
Rejeesh Kutty
8a72a6a0dc
daq3: compilation fixes - latest changes
2014-12-08 14:49:52 -05:00
Rejeesh Kutty
7c3ed75b79
daq3: compilation fixes - latest changes
2014-12-08 14:49:40 -05:00
Rejeesh Kutty
40287f4d97
remove fmcadc3
2014-12-08 14:39:43 -05:00
Rejeesh Kutty
b6b5759662
Merge branch 'hdl_2014_r2'
...
Conflicts:
library/axi_ad9234/axi_ad9234.v
library/axi_ad9234/axi_ad9234_channel.v
library/axi_ad9234/axi_ad9234_constr.xdc
library/axi_ad9234/axi_ad9234_if.v
library/axi_ad9234/axi_ad9234_ip.tcl
library/axi_ad9234/axi_ad9234_pnmon.v
library/axi_ad9434/axi_ad9434.v
library/axi_ad9434/axi_ad9434_core.v
projects/ad9434_fmc/common/ad9434_bd.tcl
projects/ad9467_fmc/common/ad9467_bd.tcl
projects/common/kc705/kc705_system_bd.tcl
projects/common/kcu105/kcu105_system_bd.tcl
projects/common/mitx045/mitx045_system_bd.tcl
projects/common/vc707/vc707_system_bd.tcl
projects/common/zc706/zc706_system_bd.tcl
projects/daq1/common/daq1_bd.tcl
projects/daq1/zc706/system_top.v
projects/fmcomms1/ac701/system_top.v
projects/fmcomms1/common/fmcomms1_bd.tcl
projects/fmcomms2/ac701/system_constr.xdc
projects/fmcomms2/common/fmcomms2_bd.tcl
projects/fmcomms2/zc702/system_constr.xdc
projects/usdrx1/common/usdrx1_bd.tcl
2014-12-08 14:25:00 -05:00
Rejeesh Kutty
82b9ebe23d
remove replaced projects
2014-12-08 10:45:12 -05:00
Rejeesh Kutty
19e4950b72
renamed to match official names
2014-12-08 10:44:15 -05:00
Michael Hennerich
84174460bb
projects/common/kcu105/kcu105_system_bd: Restore axi_ethernet SupportLevel 0
...
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-05 14:50:45 +01:00
Michael Hennerich
bb6cc40902
projects/common: KCU105 VC707 update and sync axi_ethernet:6.1 features
...
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-05 14:50:45 +01:00
Michael Hennerich
8e4d0a1b60
projects/common: KCU105 VC707 KC705 sync microblaze core defaults
...
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-05 14:50:45 +01:00
Adrian Costina
4c05e8de5d
motor_control: Updated project to Vivado 14.2. Temporary removed XADC
...
- fixed constraints
- updated interrupt system
- used ad_iobuf
- The XADC was removed because the XADC IPI generates vaux inputs 0 and 10 even if 0 and 8 are selected
2014-12-05 11:48:00 +02:00
Adrian Costina
ea1a50c985
axi_mc_speed: updated core to latest axi interface implementation
2014-12-05 11:46:20 +02:00
Adrian Costina
0d2888a5a6
axi_mc_current_monitor: updated core to latest axi interface implementation
2014-12-05 11:45:37 +02:00
Adrian Costina
21591dc485
axi_mc_controller: updated core to latest axi interface implementation
2014-12-05 11:43:59 +02:00
Istvan Csomortani
11f41d1dff
zynq_plddr3: Fix PLDDR3's Reset Generator
...
Reset generator's external reset signal was active low, but the GT reset is active high, and both the DDR controller and FIFO2S were in reset.
Therefore the external reset active state is changed to active high. This setup in general is made by the tool automatically, in order to do it correctly, need to
set this two property of the reset generator.
2014-12-04 15:42:28 +02:00
Lars-Peter Clausen
324c0528c2
fmcomms6: Better cope with higher sample rates
...
There can be a rather high latency between the last byte of a burst has been send and the time the response for the burst is received. Running at high samplerates this can cause the internal DMA store and forward FIFO to fill up and subsequently stall the DMA pipeline and drop samples. To better cope with the situation double the size of the internal FIFO. Also increase the clock of the AXI bus to be able to accommodate a samplerate of 310MHz.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-04 13:28:37 +01:00
Lars-Peter Clausen
46156b7ceb
fmcomms6: Add DMA overflow signal to ILA
...
This is useful for debugging DMA overflows.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-04 13:28:37 +01:00
Istvan Csomortani
56a8a54080
ad9625x2_fmc: Increase the dma fifo data depth
2014-12-03 12:13:08 +02:00
Istvan Csomortani
757c213165
ad9625x2_fmc: Integrate the dac spi interface into the SPI interface
2014-12-03 12:06:43 +02:00
Rejeesh Kutty
805d52346c
fmcomms7: compilation fixes on plddr3
2014-12-02 10:39:01 -05:00
Rejeesh Kutty
f01d1aae2d
fmcomms7: compilation fixes on plddr3
2014-12-02 10:38:44 -05:00
Lars-Peter Clausen
95e113e1a3
fmcomms6: Connect DMA directly to the HP port
...
The axi_dmac supports native AXI3, there is no need to add a interconnect
for protocol conversion between it and the HP port.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-01 13:45:45 +01:00
Lars-Peter Clausen
45fc7bb7e2
fmcomms6: Set ila type to native
...
With version 4.0 ila defaults to the AXI monitor type, so explicitly
configure it for native.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-01 13:45:45 +01:00
Lars-Peter Clausen
5b68b79dec
ad9467_fmc: Set ila type to native
...
With version 4.0 ila defaults to the AXI monitor type, so explicitly
configure it for native.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-01 13:45:45 +01:00
Lars-Peter Clausen
6197563506
up_axi: Fix up_raddr/up_waddr port width
...
Make sure that the port declaration width matches with the reg declaration
later on.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-01 13:45:45 +01:00
Adrian Costina
d5422c2ecc
fmcomms2: Zed, fixed iic multiplexer ad_iobuf connections
2014-11-28 14:17:09 +02:00
Istvan Csomortani
d5a1df2fe6
usdrx1_zc706: Update interrupts.
2014-11-27 14:06:13 +02:00
Istvan Csomortani
eed1981ede
usdrx1_fmc: Fix GT lane number definition.
2014-11-27 14:05:54 +02:00
Istvan Csomortani
a576f7dc98
ad9671_zc706: Update interrupts
2014-11-27 14:05:43 +02:00
Istvan Csomortani
0ccc546aeb
ad9671_fmc: Fix GT lane number definition
2014-11-27 14:05:34 +02:00
Istvan Csomortani
ee7d427123
ad9671_fmc: Cosmetic changes
...
Delete trailing whitespaces.
2014-11-27 14:05:24 +02:00
Istvan Csomortani
419d38b9f6
kc705_base: Define sys_addr_mem_seg for dmafifo
2014-11-26 15:38:41 +02:00
Istvan Csomortani
6fd2f8c913
daq2_fmc: Update interrupts
...
Update interrupts for ZC706 and KC705 carrier.
2014-11-26 15:38:24 +02:00
Istvan Csomortani
bfd89dc9c7
daq2_kc705: Fix constraint file
...
I/O standard for trig_[p/n] is LVDS_25
2014-11-26 15:38:10 +02:00
Istvan Csomortani
630f26442a
daq2_kc705: Instantiate dmafifo module
2014-11-26 15:37:57 +02:00
Istvan Csomortani
00c7b23b21
daq2_fmc: Cosmetic changes
...
Delete trailing whitespaces, no functional changes.
2014-11-26 15:37:48 +02:00
Adrian Costina
199e86d715
fmcomms2: Added iic_fmc_intr to the zed top file
2014-11-26 11:47:16 +02:00
Adrian Costina
03751827cb
fmcomms2: Updated vc707 project
...
- updated constraints
- updated interrupts
- used ad_iobuf
- added linear_flash
2014-11-26 11:47:06 +02:00
Adrian Costina
40c5816bd7
fmcomms2: Updated mitx045 project. Updated constraints. Updated interrupts
2014-11-26 11:46:53 +02:00
Istvan Csomortani
626b719ad8
ad6676ebv_vc707: Update the interrupts
2014-11-26 10:56:47 +02:00
Istvan Csomortani
322324b891
ad6676evb_vc707: Add support for linear flash
2014-11-26 10:56:36 +02:00
Istvan Csomortani
67f82c9e3e
ad6676_fmc: Fix GT lane number definition
2014-11-26 10:56:23 +02:00
Lars-Peter Clausen
81f0e417d4
Add Vivado version check to adi_project_create
...
The scripts generating the projects files typically only work correctly with
one specific version of Vivado. If a incorrect version is used the script
may fail at some point with a cryptic error message or may not fail but
create a bitstream that is not working as expected, e.g. unconnected
signals, etc. This patch adds a version check to adi_project_create that
will error out early on stating that the wrong version of Vivado was used
and which is the right version to use.
By default the required version will be the version that is required by the
common scripts. Individual projects can overwrite the required version by
setting the REQUIRED_VIVADO_VERSION variable to the required version or can
bypass the version check completely by setting the IGNORE_VERSION_CHECK
variable to 1.
Callers of the script can also disable the version check by setting the
ADI_IGNORE_VERSION_CHECK environment variable.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-11-25 18:35:11 +01:00