Commit Graph

1475 Commits (24fdd2b9b76136176eb9a62ccc64dd182648b7b1)

Author SHA1 Message Date
AndreiGrozav 24fdd2b9b7 pzsdr/ccpci: Update common design to 2015.4 2016-03-18 15:30:10 +02:00
AndreiGrozav f8b155faab pzsdr/ccfmc: Update common design to 2015.4 2016-03-18 15:28:56 +02:00
AndreiGrozav d567af54ef imageon: Update common design to 2015.4 2016-03-18 15:27:31 +02:00
AndreiGrozav 995debedce fmcomms2: Update common design to 2015.4 2016-03-18 15:26:52 +02:00
AndreiGrozav b555be25d5 kcu105: Update common design to 2015.4 2016-03-18 15:22:42 +02:00
AndreiGrozav 412013d939 adv7511: Update common design to 2015.4 2016-03-18 15:01:25 +02:00
AndreiGrozav d355aa0ea6 daq3/zc706: Updated design to 2015.4 2016-03-17 11:46:48 +02:00
AndreiGrozav 012b095006 daq3: Updated common design to 2015.4 2016-03-17 11:44:27 +02:00
AndreiGrozav 38c3f7474a ad6676: Updated common design to 2015.4 2016-03-17 11:40:46 +02:00
AndreiGrozav abc03fff2c fmcomms7: Updated design to 2015.4 2016-03-17 09:11:41 +02:00
AndreiGrozav 59c726ecbe fmcjesdadc1: Updated common design to 2015.4 2016-03-16 10:14:06 +02:00
AndreiGrozav 1a3aab0c13 fmcomms1: Updated common design to 2015.4 2016-03-16 10:09:54 +02:00
AndreiGrozav b7be089b82 daq2: Updated common design to 2015.4 2016-03-16 10:02:42 +02:00
AndreiGrozav 334fce03a3 fmcadc4/zc706: Updated design to 2015.4 2016-03-15 15:28:11 +02:00
AndreiGrozav e8dd5f9788 fmcadc4: Updated common design to 2015.4 2016-03-15 15:27:25 +02:00
AndreiGrozav 98cc7dad7d fmcadc2: Updated common design to 2015.4 2016-03-15 15:26:05 +02:00
AndreiGrozav ceea7f25b2 fmcomms2: Updated common design to 2015.4 2016-03-15 15:23:20 +02:00
AndreiGrozav 6f03998b95 zc702: Updated common design to 2015.4 2016-03-15 15:21:22 +02:00
AndreiGrozav a0c5f46940 zed: Updated common design to 2015.4 2016-03-15 15:20:46 +02:00
AndreiGrozav 9a258d5e4c vc707: Updated common design to 2015.4 2016-03-15 15:20:02 +02:00
AndreiGrozav bcf5bd8137 mitx045: Updated common design to 2015.4 2016-03-15 15:18:31 +02:00
AndreiGrozav 27f5f1dcbe kc705: Updated common design to 2015.4 2016-03-15 15:17:53 +02:00
AndreiGrozav eb743e0e03 ac701: Updated common design to 2015.4 2016-03-15 15:17:02 +02:00
AndreiGrozav d282064103 zc706: Updated common design to 2015.4 2016-03-15 15:16:36 +02:00
AndreiGrozav 71be9519ec adi_project.tcl: Updated to 2015.4 2016-03-15 15:03:50 +02:00
Adrian Costina 40fb68dfd5 ad9265, ad9434, ad9467, daq1, daq2, daq3, fmcadc2, fmcadc4, fmcadc5, fmcjesdadc1, fmcomms6, fmcomms7, usdrx1: updated common spi module so that spi streaming is possible 2016-03-02 13:39:37 +02:00
Adrian Costina becc23a69b daq2: Modified common spi module so that spi streaming is possible
- stop incrementing spi_count after the instruction cycle
2016-03-01 17:25:58 +02:00
Rejeesh Kutty f6e64e42b0 kcu105: add ethernet idelaycntrl 2016-02-26 13:19:49 -05:00
Adrian Costina 8ccd8d87bb daq2: A10GX, increase analog/digital reset durations
- reset the xcvr_rst_cntrl only from the axi_jesd_xcvr
- checked separate RX/TX reset per channel
2016-02-23 11:41:38 +02:00
Adrian Costina 89f7aadfb1 fmcjesdadc1: A5GT, connected xcvr_rxt_cntrl reset input to the axi_jesd_xcvr reset output
This will allow for the transceivers to be reset by the axi_jesd_xcvr core
2016-02-23 11:31:07 +02:00
Adrian Costina 0f37dd6424 fmcjesdadc1: Fixed project
- changed system_project.tcl so that all base designs to be included
- changed DMA properties to take into consideration the new parameter names
- changed reset bridges to asynchronous
- increased maximum burst size of the DMA bridge
- changed the data_width of the memory bus to 256, as with 512 timing violations may occur
- changed base addresses for the base system to be the same as in the previous release
2016-02-19 14:09:57 +02:00
Adrian Costina d94f157454 arradio: Changed ADC/DAC DMA address length to 24 bit 2016-02-16 15:27:51 +02:00
Adrian Costina 43e03ca6f7 arradio: Updated project
- made the reset bridges asynchronous
- connected the arradio gpio to the CPU interconnect
2016-02-16 14:50:23 +02:00
Adrian Costina 61f9f72a75 fmcjesdadc1: Updated VC707 project for maximum throughput from DMA to DDR
- Increased the DMAs internal FIFO
2016-02-09 12:30:56 +02:00
Adrian Costina c431adb793 fmcjesdadc1: Updated KC705 project for maximum throughput from DMA to DDR
- Increased the DMA internal FIFO
2016-02-09 12:00:27 +02:00
Adrian Costina ad9ecbbbb6 daq2: Updated a10gx project to quartus 15.1.1 2016-02-05 17:43:05 +02:00
Istvan Csomortani e22d5d5c18 daq2: Fix clock constraints for KC705 and VC707 2016-01-22 19:09:57 +02:00
Adrian Costina 59fbd99fdb fmcjesdadc1: Added clock constraint for the ADC path 2016-01-22 15:46:20 +02:00
Adrian Costina dca39c26f9 ad6676evb: Added clock constraint for the ADC path 2016-01-22 15:45:16 +02:00
Adrian Costina 9cd0378003 fmcadc2: Added clock constraint for the ADC path 2016-01-22 15:44:04 +02:00
Adrian Costina 7013b319b0 motcon2_fmc: Fixed reset connection for cpack cores 2015-12-22 12:03:34 +02:00
Adrian Costina 34b832e22a fmcomms6: Fixed reset connection for cpack core 2015-12-16 10:36:33 +02:00
Adrian Costina 35f6bd16e9 fmcomms5: Fixed reset connection for cpack core 2015-12-16 10:34:36 +02:00
Adrian Costina 6e549171f0 fmcomms5: Connected the clk input of the ad9361 to l_clk 2015-12-02 14:43:44 +02:00
Adrian Costina 2309c4d83c Makefiles: Removed " from path 2015-11-27 14:02:46 +02:00
Adrian Costina 159f6c1216 Makefiles: Updated Makefiles
- for altera projects, taken into consideration of the new location for common qsys files
- for fmcomms5, added wfifo dependency
- for daq3, added mfifo dependency
2015-11-27 12:39:42 +02:00
Istvan Csomortani 36febf8591 Merge branch 'master' into dev
Conflicts:
	library/axi_ad9361/axi_ad9361_ip.tcl
	library/axi_dmac/Makefile
	library/axi_dmac/axi_dmac_constr.ttcl
	library/axi_dmac/axi_dmac_ip.tcl
	library/common/ad_tdd_control.v
	projects/daq2/common/daq2_bd.tcl
	projects/fmcjesdadc1/common/fmcjesdadc1_bd.tcl
	projects/fmcomms2/zc706pr/system_project.tcl
	projects/fmcomms2/zc706pr/system_top.v
	projects/usdrx1/common/usdrx1_bd.tcl

This merge was made, to recover any forgotten fixes from master,
before creating the new release branch. All conflicts were reviewed
and resolved.
2015-11-26 13:38:11 +02:00
Adrian Costina ea57b3c03c daq2: A10GX, add project specific IP search paths 2015-11-25 10:58:36 +02:00
Adrian Costina e8a595b81e fmcjesdadc1: Updated a5soc design 2015-11-24 15:39:52 +02:00
Adrian Costina fd3910a915 fmcjesdadc1: Updated a5gt design 2015-11-24 15:39:21 +02:00