Istvan Csomortani
d69d105b5d
vc707_common: Fix address mapping
...
The axi_ethernet/eth_buf/S_AXI_2TEMAC address space and axi_ethernet/eth_mac/s_axi/Reg address
segment does not exist in 2014.4.
2015-01-29 12:22:06 +02:00
Istvan Csomortani
e8ff30119d
vc707_xdc: Delete unnecessary clock definition
2015-01-29 11:39:10 +02:00
Istvan Csomortani
6c8ea24f20
common: Update VC707 base design to 2014.4
2015-01-28 16:24:52 +02:00
Istvan Csomortani
e1d8dd10a9
daq2: Initial check in of the VC707 based project
...
NOTE: Can not communicate with the clock chip, rx/tx PLL not locking.
2015-01-28 16:24:06 +02:00
Istvan Csomortani
659e0cca4e
cftl_cip: Initial check in.
...
Project cftl_cip supports the following Circuits from the Lab pmods:
+ EVAL-CN0350-PMDZ
+ EVAL-CN0335-PMDZ
+ EVAL-CN0336-PMDZ
+ EVAL-CN0337-PMDZ
Note: Additional testing needed!
2015-01-23 18:29:32 +02:00
Adrian Costina
463a3bbc88
cftl_std: Updated project. Switched to PS7 gpio. Renamed signals.
2015-01-23 14:11:33 +02:00
Adrian Costina
9672271155
fmcjestadc1: a5gt: Updated project to work with linux and fixed ethernet
...
- added phy reset mechanism for proper functioning of the ethernet
- not all DDR is accesible, as NIOS2 can't access it with MMU enabled
2015-01-23 13:30:56 +02:00
Adrian Costina
5a77ab0161
a5gt:common: Added phy reset signal from ethernet in pin assignments
2015-01-23 12:31:41 +02:00
Adrian Costina
050f17e034
a5gt3: common: corrected naming in pin assignments. added reset signal from FPGA2
2015-01-23 12:30:16 +02:00
Rejeesh Kutty
72e89852b6
daq2/kc705: 2014.4 updates
2015-01-14 12:58:08 -05:00
Rejeesh Kutty
024d9e7309
replace export hardware -- hwdef/sysdef
2015-01-13 13:40:21 -05:00
Rejeesh Kutty
03988f1c9f
kcu105-daq2-2014.4-- intermediate fixes
2015-01-13 13:40:20 -05:00
Rejeesh Kutty
b595cce697
kcu105-daq2-2014.4-- intermediate fixes
2015-01-13 13:40:18 -05:00
Rejeesh Kutty
b0b4bfe531
kcu105-daq2-2014.4-- intermediate fixes
2015-01-13 13:40:17 -05:00
Adrian Costina
47871287f3
kc705: Updated base project with linear flash. Updated all depending projects
2015-01-13 10:19:07 +02:00
Rejeesh Kutty
b9e2c5659f
fmcomms2: 2014.4
2015-01-09 14:12:54 -05:00
Rejeesh Kutty
9e64df917c
daq2: 2014.4
2015-01-09 14:12:53 -05:00
Rejeesh Kutty
65d9f08763
zc706: mig 2014.4
2015-01-09 14:12:52 -05:00
Rejeesh Kutty
868df1aac8
zc706: mig 2014.4
2015-01-09 14:12:51 -05:00
Rejeesh Kutty
0258afbadc
board: add ddr seg variable
2015-01-09 14:12:50 -05:00
Adrian Costina
22d881981e
cftl_std: Renamed cftl standard project
2015-01-09 19:44:13 +02:00
Rejeesh Kutty
debbe31713
Merge remote-tracking branch 'origin/master' into dev
2015-01-09 11:12:56 -05:00
Rejeesh Kutty
117686f352
ad9739a: updates for ad9739a
2015-01-09 10:54:50 -05:00
Rejeesh Kutty
785d3a4ae3
ad9739a: updates for ad9739a
2015-01-09 10:54:40 -05:00
Rejeesh Kutty
e8d0782a2e
ad9739a: updates for ad9739a
2015-01-09 10:54:22 -05:00
Rejeesh Kutty
baea2090d6
ad9739a: updates for ad9739a
2015-01-09 10:54:12 -05:00
Rejeesh Kutty
c9b6411e86
ad9739a: updates for ad9739a
2015-01-09 10:54:00 -05:00
Adrian Costina
51e6d0888a
cftl_xil_zed: Initial commit for common platform used with CFTL circuits
...
This common platform uses PS7 SPI and I2C to communicate with different chips.
On different connectors different pin configurations are supported:
- On connector JA, a spi interface and a 2 pin GPIO
- On connector JB, a I2C interface
- On connector JC, a spi interface with 2 chip selects
2015-01-09 17:47:29 +02:00
Rejeesh Kutty
a9cc8f6c91
ad9739a_fmc: added
2015-01-08 10:35:59 -05:00
Istvan Csomortani
a170ebfb82
imageon: Initial commit
...
Initial commit of the IMAGEON project for ZC706. NOT tested.
2015-01-08 17:01:22 +02:00
Adrian Costina
f566268db5
zed_common: Updated common to 2014.4
2015-01-08 11:59:26 +02:00
Adrian Costina
f6df66ea06
motcon2_fmc: initial commit of the base design
...
Because vivado crashes when adding the speed detector, it's not part of this commit.
The controller is also not part of this commit
2015-01-08 11:57:22 +02:00
Rejeesh Kutty
eb569b991d
dmafifo- remove util fifo setup
2015-01-06 16:23:14 -05:00
Rejeesh Kutty
9e707d8a33
rfifo: wrapper updates
2015-01-06 16:17:33 -05:00
Rejeesh Kutty
a944deebd5
wfifo: wrapper updates
2015-01-06 16:17:25 -05:00
Rejeesh Kutty
d2baf17ff0
rfsom: updated to rfsom
2014-12-23 14:04:02 -05:00
Rejeesh Kutty
3d1ba585ee
rfsom: updated to rfsom
2014-12-23 14:04:01 -05:00
Rejeesh Kutty
19c2da836c
rfsom: updated to rfsom
2014-12-23 14:03:59 -05:00
Rejeesh Kutty
61ba4f4357
rfsom: updated to rfsom
2014-12-23 14:03:58 -05:00
Rejeesh Kutty
614dfcd93c
rfsom: updated to rfsom
2014-12-23 14:03:57 -05:00
Rejeesh Kutty
4b571ded8f
fmcomms2/rfsom: initial commit
2014-12-23 14:03:56 -05:00
Rejeesh Kutty
ee52602c89
rfsom: initial commit
2014-12-23 14:03:55 -05:00
Rejeesh Kutty
8e41af7b92
fmcomms2: 2014.4 update
2014-12-23 14:03:54 -05:00
Rejeesh Kutty
0de1a38245
zc706: 2014.4 update
2014-12-23 14:03:52 -05:00
Rejeesh Kutty
43037a42eb
scripts: 2014.4 update
2014-12-23 14:03:51 -05:00
Adrian Costina
71baa129a7
VC707: Fixed linear flash timings
2014-12-19 15:45:14 +02:00
Adrian Costina
2ff72d60d1
fmcomms2: Updated VC707 project to fix ethernet problem
2014-12-19 15:45:05 +02:00
Istvan Csomortani
4a9c4cdf19
fmcadc2_zc706: Fix PLDDR fifo name
2014-12-19 13:01:33 +02:00
Istvan Csomortani
6230cb25b7
fmcomms7_zc706: Add constraint file for PLDDR
2014-12-19 13:01:27 +02:00
Istvan Csomortani
6e124c4c24
fmcomms7_zc706: Connect PLDDR rst to external push button
2014-12-19 13:01:21 +02:00
Istvan Csomortani
a0b83bac7f
fmcomms7_zc706: Delete trailing spaces from system top
2014-12-19 13:01:15 +02:00
Istvan Csomortani
362b0f5300
daq3_zc706: Add constraint file for PLDDR
2014-12-19 13:01:10 +02:00
Istvan Csomortani
d77e28e372
daq3_zc706: Connect PLDDR rst to external push button
2014-12-19 13:01:05 +02:00
Istvan Csomortani
d483801e2d
daq3_zc706: Delete trailing spaces from system_top
2014-12-19 13:00:59 +02:00
Istvan Csomortani
df205f5cea
fmcadc2_zc706: Connect PLDDR rst to external push button
2014-12-19 13:00:53 +02:00
Istvan Csomortani
8fc1f046a4
fmcadc4_zc706: Add constraint file for PLDDR
2014-12-19 13:00:48 +02:00
Istvan Csomortani
7ec1e282d9
daq2_zc706: Add constraint file for the PLDDR
2014-12-19 13:00:42 +02:00
Istvan Csomortani
a6cf615ee0
zc706_constr: Move the sys_rst related constraint definition to zc706_system_mig_constr.xdc
2014-12-19 13:00:35 +02:00
Rejeesh Kutty
153a4cef18
daq2: missing sys_rst decl.
2014-12-19 13:00:21 +02:00
Rejeesh Kutty
ad144ef06a
plddr3: sys-rst from board pushbutton
2014-12-19 13:00:07 +02:00
Rejeesh Kutty
33a8c8a155
plddr3: sys-rst from board pushbutton
2014-12-19 13:00:01 +02:00
Rejeesh Kutty
0cc29fe03b
plddr3: sys-rst from board pushbutton
2014-12-19 12:59:54 +02:00
Rejeesh Kutty
51bdcb1b12
plddr3: sys-rst from board pushbutton
2014-12-19 12:59:48 +02:00
Rejeesh Kutty
daba3fb72e
plddr3: sys-rst from board pushbutton
2014-12-19 12:59:42 +02:00
Rejeesh Kutty
758ac6bb8e
plddr3: sys-rst from board pushbutton
2014-12-19 12:59:35 +02:00
Adrian Costina
1a9eb8196a
VC707: Fixed linear flash timings
2014-12-18 17:49:00 +02:00
Istvan Csomortani
23e2886b5d
fmcadc2_zc706: Fix PLDDR fifo name
2014-12-18 16:57:19 +02:00
Istvan Csomortani
b684c8bf33
fmcomms7_zc706: Add constraint file for PLDDR
2014-12-18 10:15:11 +02:00
Istvan Csomortani
ae09030044
fmcomms7_zc706: Connect PLDDR rst to external push button
2014-12-18 10:14:32 +02:00
Istvan Csomortani
0aa4661122
fmcomms7_zc706: Delete trailing spaces from system top
2014-12-18 10:13:16 +02:00
Istvan Csomortani
e81327b794
daq3_zc706: Add constraint file for PLDDR
2014-12-18 10:08:33 +02:00
Istvan Csomortani
8121d11993
daq3_zc706: Connect PLDDR rst to external push button
2014-12-18 10:07:52 +02:00
Istvan Csomortani
090aed508e
daq3_zc706: Delete trailing spaces from system_top
2014-12-18 10:06:29 +02:00
Istvan Csomortani
abdb59a28e
fmcadc2_zc706: Connect PLDDR rst to external push button
2014-12-18 10:04:01 +02:00
Istvan Csomortani
31a95042cf
fmcadc4_zc706: Add constraint file for PLDDR
2014-12-18 10:01:16 +02:00
Istvan Csomortani
39cc7b8b2e
daq2_zc706: Add constraint file for the PLDDR
2014-12-18 10:00:35 +02:00
Istvan Csomortani
59e610be09
zc706_constr: Move the sys_rst related constraint definition to zc706_system_mig_constr.xdc
2014-12-17 19:07:43 +02:00
Adrian Costina
656246f2ba
fmcomms2: Updated VC707 project to fix ethernet problem
2014-12-17 16:16:01 +02:00
Rejeesh Kutty
90fe993db2
daq2: missing sys_rst decl.
2014-12-15 14:39:40 -05:00
Rejeesh Kutty
725b407523
plddr3: sys-rst from board pushbutton
2014-12-15 12:59:36 -05:00
Rejeesh Kutty
7b1e3d77e8
plddr3: sys-rst from board pushbutton
2014-12-15 12:59:25 -05:00
Rejeesh Kutty
0a6769fda9
plddr3: sys-rst from board pushbutton
2014-12-15 12:59:16 -05:00
Rejeesh Kutty
f99bd3609b
plddr3: sys-rst from board pushbutton
2014-12-15 12:59:04 -05:00
Rejeesh Kutty
77fa96fa67
plddr3: sys-rst from board pushbutton
2014-12-15 12:58:54 -05:00
Rejeesh Kutty
ed7f8b4908
plddr3: sys-rst from board pushbutton
2014-12-15 12:58:44 -05:00
Rejeesh Kutty
ca36ef0e02
Merge remote-tracking branch 'origin/hdl_2014_r2' into dev
2014-12-11 11:26:30 -05:00
Rejeesh Kutty
d82952b22a
daq2/kcu105: lane assignment fixes
2014-12-11 11:19:38 -05:00
Adrian Costina
7dddac84f1
motcon1_fmc: Fixed issue introduced by merge
2014-12-11 14:32:32 +02:00
Istvan Csomortani
9e8fd8ed9e
base_design: External IIC reset is connected to Vcc
...
External IIC reset is connected to Vcc in case of AC701, KC705 and VC707
2014-12-11 11:14:54 +02:00
Istvan Csomortani
caa0268434
base_design: External IIC reset is connected to Vcc
...
External IIC reset is connected to Vcc in case of AC701, KC705 and VC707
2014-12-11 11:13:07 +02:00
Adrian Costina
86ad9213e0
fmcomms2: Update c5soc system_timing script
2014-12-10 17:54:11 +02:00
Adrian Costina
6ac774a9dd
fmcjesdadc1: Update altera system_timing script
2014-12-10 17:53:29 +02:00
Rejeesh Kutty
e7c920bbd9
fmcomms2/ml605: compilation fixes
2014-12-09 14:32:39 -05:00
Rejeesh Kutty
4cf435ee39
fmcomms2/ml605: compilation fixes
2014-12-09 14:32:39 -05:00
Rejeesh Kutty
8b41034825
fmcomms2/ml605: compilation fixes
2014-12-09 14:32:39 -05:00
Rejeesh Kutty
842ba19aaa
fmcomms2/ml605: compilation fixes
2014-12-09 14:31:12 -05:00
Rejeesh Kutty
d7a6b5e6d0
fmcomms2/ml605: compilation fixes
2014-12-09 14:31:11 -05:00
Rejeesh Kutty
d57b6b01c6
fmcomms2/ml605: compilation fixes
2014-12-09 14:31:10 -05:00
Michael Hennerich
9103f6706e
Merge branch 'hdl_2014_r2' of https://github.com/analogdevicesinc/hdl into hdl_2014_r2
2014-12-09 17:38:37 +01:00
Michael Hennerich
138e789fb6
projects/fmcjesdadc1/common/fmcjesdadc1_bd.tcl: Fix interrupts
...
sys_concat_intc: don't reset NUM_PORTS to 6
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-09 17:38:16 +01:00
Rejeesh Kutty
772edbae20
fmcadc4: fifo updates
2014-12-09 10:43:02 -05:00
Rejeesh Kutty
d149890426
fmcadc4: fifo updates
2014-12-09 10:43:02 -05:00
Rejeesh Kutty
dad0745fbe
fmcadc4: fifo updates
2014-12-09 10:43:02 -05:00
Rejeesh Kutty
987257e3c3
fmcadc4: fifo updates
2014-12-09 10:43:01 -05:00
Rejeesh Kutty
0c6cbdd303
fmcadc4: fifo updates
2014-12-09 10:38:51 -05:00
Rejeesh Kutty
f044ab94e0
fmcadc4: fifo updates
2014-12-09 10:38:50 -05:00
Rejeesh Kutty
e2a9502e1e
fmcadc4: fifo updates
2014-12-09 10:38:49 -05:00
Rejeesh Kutty
a2607a8057
fmcadc4: fifo updates
2014-12-09 10:38:47 -05:00
Istvan Csomortani
a6b7b9d880
ad9467_kc705: Fix memory segment offset for SEG_axi_ddr_cntrl
2014-12-09 16:20:39 +02:00
Istvan Csomortani
2e4640d5c5
ad9467_kc705: Fix memory segment offset for SEG_axi_ddr_cntrl
2014-12-09 16:17:46 +02:00
Istvan Csomortani
4d28825741
ad9467_kc705: Fix typos.
2014-12-09 13:46:51 +02:00
Istvan Csomortani
a0d5e7862e
ad9467_kc705: Fix typos.
2014-12-09 12:07:49 +02:00
Istvan Csomortani
915ee7a268
fmcjesdadc1_kc705: Connect the SPI interrupt to the controller
2014-12-09 11:54:16 +02:00
Istvan Csomortani
ee04eb637b
ad9467_kc705: Fix interrupts
2014-12-09 11:54:08 +02:00
Istvan Csomortani
37c3af9929
fmcjesdadc1_kc705: Connect the SPI interrupt to the controller
2014-12-09 11:51:36 +02:00
Istvan Csomortani
b83299c606
ad9467_kc705: Fix interrupts
2014-12-09 11:48:46 +02:00
Rejeesh Kutty
1b4a4bc06e
daq3: compilation fixes - latest changes
2014-12-08 14:51:52 -05:00
Rejeesh Kutty
c0d588ba8c
daq3: compilation fixes - latest changes
2014-12-08 14:51:52 -05:00
Rejeesh Kutty
26d72d306e
daq3: compilation fixes - latest changes
2014-12-08 14:51:51 -05:00
Rejeesh Kutty
abff7097f6
daq3: compilation fixes - latest changes
2014-12-08 14:50:03 -05:00
Rejeesh Kutty
8a72a6a0dc
daq3: compilation fixes - latest changes
2014-12-08 14:49:52 -05:00
Rejeesh Kutty
7c3ed75b79
daq3: compilation fixes - latest changes
2014-12-08 14:49:40 -05:00
Rejeesh Kutty
0a8fabe874
Merge branch 'hdl_2014_r2' into dev
...
Conflicts:
projects/fmcadc5/common/fmcadc5_bd.tcl
projects/motcon1_fmc/common/motcon1_fmc_bd.tcl
projects/motcon1_fmc/zed/system_constr.xdc
projects/motcon1_fmc/zed/system_top.v
2014-12-08 11:32:13 -05:00
Rejeesh Kutty
82b9ebe23d
remove replaced projects
2014-12-08 10:45:12 -05:00
Rejeesh Kutty
19e4950b72
renamed to match official names
2014-12-08 10:44:15 -05:00
Adrian Costina
a558d4000d
motcon1_fmc: Added XADC to the project, the external muxing is controlled by generic GPIO, not XADC GPIO
2014-12-08 11:27:47 +02:00
Paul Cercueil
d5572eaa49
ad9265_fmc: Fix unconnected DMA irq
...
Signed-off-by: Paul Cercueil <paul.cercueil@analog.com>
2014-12-05 17:44:47 +01:00
Michael Hennerich
84174460bb
projects/common/kcu105/kcu105_system_bd: Restore axi_ethernet SupportLevel 0
...
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-05 14:50:45 +01:00
Michael Hennerich
bb6cc40902
projects/common: KCU105 VC707 update and sync axi_ethernet:6.1 features
...
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-05 14:50:45 +01:00
Michael Hennerich
8e4d0a1b60
projects/common: KCU105 VC707 KC705 sync microblaze core defaults
...
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-05 14:50:45 +01:00
Michael Hennerich
7e18162632
projects/common/kcu105/kcu105_system_bd: Restore axi_ethernet SupportLevel 0
...
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-05 14:48:37 +01:00
Adrian Costina
e6e9c0058d
motor_control: Updated project to Vivado 14.2. Temporary removed XADC
...
- fixed constraints
- updated interrupt system
- used ad_iobuf
- The XADC was removed because the XADC IPI generates vaux inputs 0 and 10 even if 0 and 8 are selected
2014-12-05 11:53:23 +02:00
Adrian Costina
4c05e8de5d
motor_control: Updated project to Vivado 14.2. Temporary removed XADC
...
- fixed constraints
- updated interrupt system
- used ad_iobuf
- The XADC was removed because the XADC IPI generates vaux inputs 0 and 10 even if 0 and 8 are selected
2014-12-05 11:48:00 +02:00
Istvan Csomortani
11f41d1dff
zynq_plddr3: Fix PLDDR3's Reset Generator
...
Reset generator's external reset signal was active low, but the GT reset is active high, and both the DDR controller and FIFO2S were in reset.
Therefore the external reset active state is changed to active high. This setup in general is made by the tool automatically, in order to do it correctly, need to
set this two property of the reset generator.
2014-12-04 15:42:28 +02:00
Istvan Csomortani
34ffa15b12
zynq_plddr3: Fix PLDDR3's Reset Generator
...
Reset generator's external reset signal was active low, but the GT reset is active high, and both the DDR controller and FIFO2S were in reset.
Therefore the external reset active state is changed to active high. This setup in general is made by the tool automatically, in order to do it correctly, need to
set this two property of the reset generator.
2014-12-04 15:39:17 +02:00
Lars-Peter Clausen
58bc7c6886
fmcomms6: Add DMA overflow signal to ILA
...
This is useful for debugging DMA overflows.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-04 14:23:09 +01:00
Lars-Peter Clausen
a9c6148570
fmcomms6: Better cope with higher sample rates
...
There can be a rather high latency between the last byte of a burst has been send and the time the response for the burst is received. Running at high samplerates this can cause the internal DMA store and forward FIFO to fill up and subsequently stall the DMA pipeline and drop samples. To better cope with the situation double the size of the internal FIFO. Also increase the clock of the AXI bus to be able to accommodate a samplerate of 310MHz.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-04 13:56:59 +01:00
Lars-Peter Clausen
324c0528c2
fmcomms6: Better cope with higher sample rates
...
There can be a rather high latency between the last byte of a burst has been send and the time the response for the burst is received. Running at high samplerates this can cause the internal DMA store and forward FIFO to fill up and subsequently stall the DMA pipeline and drop samples. To better cope with the situation double the size of the internal FIFO. Also increase the clock of the AXI bus to be able to accommodate a samplerate of 310MHz.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-04 13:28:37 +01:00
Lars-Peter Clausen
46156b7ceb
fmcomms6: Add DMA overflow signal to ILA
...
This is useful for debugging DMA overflows.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-04 13:28:37 +01:00
Michael Hennerich
3cc890e604
projects/common: KCU105 VC707 update and sync axi_ethernet:6.1 features
...
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-04 09:49:09 +01:00
Michael Hennerich
2d8450abc4
Merge branch 'dev' of https://github.com/analogdevicesinc/hdl into dev
2014-12-04 09:47:46 +01:00
Michael Hennerich
3bc9b25e96
projects/common: KCU105 VC707 KC705 sync microblaze core defaults
...
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
2014-12-04 09:47:02 +01:00
Istvan Csomortani
56a8a54080
ad9625x2_fmc: Increase the dma fifo data depth
2014-12-03 12:13:08 +02:00
Istvan Csomortani
757c213165
ad9625x2_fmc: Integrate the dac spi interface into the SPI interface
2014-12-03 12:06:43 +02:00
Istvan Csomortani
48673fec6a
ad9625x2_fmc: Integrate the dac spi interface into the SPI interface
2014-12-03 12:01:47 +02:00
Istvan Csomortani
80d1314c5e
ad9625x2_fmc: Reverse "Add a separate SPI for the DAC interface"
2014-12-03 10:14:09 +02:00
Istvan Csomortani
d89ed56e10
ad9625x2_fmc: Increase the data depth of the dmafifo
2014-12-02 19:29:19 +02:00
Istvan Csomortani
0007054638
ad9625x2_fmc: Add a separate SPI for the DAC interface
...
DAC spi interface is controlled by an axi_spi core.
Modifications on GPIO layout: pwr_good is 12, vdither 13 and trig is 14.
2014-12-02 19:29:18 +02:00
Rejeesh Kutty
805d52346c
fmcomms7: compilation fixes on plddr3
2014-12-02 10:39:01 -05:00
Rejeesh Kutty
f01d1aae2d
fmcomms7: compilation fixes on plddr3
2014-12-02 10:38:44 -05:00
Lars-Peter Clausen
95e113e1a3
fmcomms6: Connect DMA directly to the HP port
...
The axi_dmac supports native AXI3, there is no need to add a interconnect
for protocol conversion between it and the HP port.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-01 13:45:45 +01:00
Lars-Peter Clausen
45fc7bb7e2
fmcomms6: Set ila type to native
...
With version 4.0 ila defaults to the AXI monitor type, so explicitly
configure it for native.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-01 13:45:45 +01:00
Lars-Peter Clausen
5b68b79dec
ad9467_fmc: Set ila type to native
...
With version 4.0 ila defaults to the AXI monitor type, so explicitly
configure it for native.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-01 13:45:45 +01:00
Lars-Peter Clausen
d773673e4f
fmcomms6: Connect DMA directly to the HP port
...
The axi_dmac supports native AXI3, there is no need to add a interconnect
for protocol conversion between it and the HP port.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-01 13:44:09 +01:00
Lars-Peter Clausen
5169d3ef59
fmcomms6: Set ila type to native
...
With version 4.0 ila defaults to the AXI monitor type, so explicitly
configure it for native.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-01 13:44:09 +01:00
Lars-Peter Clausen
3c85c7e2f8
ad9467_fmc: Set ila type to native
...
With version 4.0 ila defaults to the AXI monitor type, so explicitly
configure it for native.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-12-01 13:44:08 +01:00
Adrian Costina
7a55db59f6
fmcomms2: Zed, fixed iic multiplexer ad_iobuf connections
2014-11-28 14:19:08 +02:00
Adrian Costina
d5422c2ecc
fmcomms2: Zed, fixed iic multiplexer ad_iobuf connections
2014-11-28 14:17:09 +02:00
Istvan Csomortani
d5a1df2fe6
usdrx1_zc706: Update interrupts.
2014-11-27 14:06:13 +02:00
Istvan Csomortani
eed1981ede
usdrx1_fmc: Fix GT lane number definition.
2014-11-27 14:05:54 +02:00
Istvan Csomortani
a576f7dc98
ad9671_zc706: Update interrupts
2014-11-27 14:05:43 +02:00
Istvan Csomortani
0ccc546aeb
ad9671_fmc: Fix GT lane number definition
2014-11-27 14:05:34 +02:00
Istvan Csomortani
ee7d427123
ad9671_fmc: Cosmetic changes
...
Delete trailing whitespaces.
2014-11-27 14:05:24 +02:00
Istvan Csomortani
4ea86de4db
usdrx1_zc706: Update interrupts.
2014-11-27 14:03:54 +02:00
Istvan Csomortani
d1af4d2951
usdrx1_fmc: Fix GT lane number definition.
2014-11-27 14:03:10 +02:00
Istvan Csomortani
82561b48cc
ad9671_zc706: Update interrupts
2014-11-27 14:02:18 +02:00
Istvan Csomortani
92f85086e3
ad9671_fmc: Fix GT lane number definition
2014-11-27 14:01:36 +02:00
Istvan Csomortani
98e8f21c1d
ad9671_fmc: Cosmetic changes
...
Delete trailing whitespaces.
2014-11-27 14:00:35 +02:00
Istvan Csomortani
419d38b9f6
kc705_base: Define sys_addr_mem_seg for dmafifo
2014-11-26 15:38:41 +02:00
Istvan Csomortani
6fd2f8c913
daq2_fmc: Update interrupts
...
Update interrupts for ZC706 and KC705 carrier.
2014-11-26 15:38:24 +02:00
Istvan Csomortani
bfd89dc9c7
daq2_kc705: Fix constraint file
...
I/O standard for trig_[p/n] is LVDS_25
2014-11-26 15:38:10 +02:00
Istvan Csomortani
630f26442a
daq2_kc705: Instantiate dmafifo module
2014-11-26 15:37:57 +02:00
Istvan Csomortani
00c7b23b21
daq2_fmc: Cosmetic changes
...
Delete trailing whitespaces, no functional changes.
2014-11-26 15:37:48 +02:00
Istvan Csomortani
12f1873e17
kc705_base: Define sys_addr_mem_seg for dmafifo
2014-11-26 15:08:55 +02:00
Istvan Csomortani
8dad54b6e3
daq2_fmc: Update interrupts
...
Update interrupts for ZC706 and KC705 carrier.
2014-11-26 13:53:18 +02:00
Istvan Csomortani
4b6968c2af
daq2_kc705: Fix constraint file
...
I/O standard for trig_[p/n] is LVDS_25
2014-11-26 13:51:46 +02:00
Istvan Csomortani
14193cf4bd
daq2_kc705: Instantiate dmafifo module
2014-11-26 13:50:42 +02:00
Istvan Csomortani
f28845cc0d
daq2_fmc: Cosmetic changes
...
Delete trailing whitespaces, no functional changes.
2014-11-26 13:48:48 +02:00
Adrian Costina
199e86d715
fmcomms2: Added iic_fmc_intr to the zed top file
2014-11-26 11:47:16 +02:00
Adrian Costina
03751827cb
fmcomms2: Updated vc707 project
...
- updated constraints
- updated interrupts
- used ad_iobuf
- added linear_flash
2014-11-26 11:47:06 +02:00
Adrian Costina
40c5816bd7
fmcomms2: Updated mitx045 project. Updated constraints. Updated interrupts
2014-11-26 11:46:53 +02:00
Lars-Peter Clausen
84052ad437
Add Vivado version check to adi_project_create
...
The scripts generating the projects files typically only work correctly with
one specific version of Vivado. If a incorrect version is used the script
may fail at some point with a cryptic error message or may not fail but
create a bitstream that is not working as expected, e.g. unconnected
signals, etc. This patch adds a version check to adi_project_create that
will error out early on stating that the wrong version of Vivado was used
and which is the right version to use.
By default the required version will be the version that is required by the
common scripts. Individual projects can overwrite the required version by
setting the REQUIRED_VIVADO_VERSION variable to the required version or can
bypass the version check completely by setting the IGNORE_VERSION_CHECK
variable to 1.
Callers of the script can also disable the version check by setting the
ADI_IGNORE_VERSION_CHECK environment variable.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-11-26 10:46:34 +01:00
Adrian Costina
303a2683a2
fmcomms2: Added iic_fmc_intr to the zed top file
2014-11-26 11:26:58 +02:00
Adrian Costina
6227bc82c0
fmcomms2: Updated vc707 project
...
- updated constraints
- updated interrupts
- used ad_iobuf
- added linear_flash
2014-11-26 11:25:19 +02:00
Adrian Costina
2f77daf71d
fmcomms2: Updated mitx045 project. Updated constraints. Updated interrupts
2014-11-26 11:21:20 +02:00
Istvan Csomortani
626b719ad8
ad6676ebv_vc707: Update the interrupts
2014-11-26 10:56:47 +02:00
Istvan Csomortani
322324b891
ad6676evb_vc707: Add support for linear flash
2014-11-26 10:56:36 +02:00
Istvan Csomortani
67f82c9e3e
ad6676_fmc: Fix GT lane number definition
2014-11-26 10:56:23 +02:00
Istvan Csomortani
5e70ef4ab9
ad6676ebv_vc707: Update the interrupts
2014-11-26 10:49:14 +02:00
Istvan Csomortani
72f9dd226a
ad6676evb_vc707: Add support for linear flash
2014-11-26 10:48:27 +02:00
Istvan Csomortani
d75487d0a2
ad6676_fmc: Fix GT lane number definition
2014-11-26 10:45:00 +02:00
Lars-Peter Clausen
81f0e417d4
Add Vivado version check to adi_project_create
...
The scripts generating the projects files typically only work correctly with
one specific version of Vivado. If a incorrect version is used the script
may fail at some point with a cryptic error message or may not fail but
create a bitstream that is not working as expected, e.g. unconnected
signals, etc. This patch adds a version check to adi_project_create that
will error out early on stating that the wrong version of Vivado was used
and which is the right version to use.
By default the required version will be the version that is required by the
common scripts. Individual projects can overwrite the required version by
setting the REQUIRED_VIVADO_VERSION variable to the required version or can
bypass the version check completely by setting the IGNORE_VERSION_CHECK
variable to 1.
Callers of the script can also disable the version check by setting the
ADI_IGNORE_VERSION_CHECK environment variable.
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2014-11-25 18:35:11 +01:00
Adrian Costina
2e72a2cc0c
fmcomms1: Updated VC707 project with latest interrupts and linear flash. Fixed constraints and constraint priority
2014-11-25 15:00:00 +02:00
Adrian Costina
dbc9da8598
fmcomms1: Updated KC705 project with latest interrupts. Fixed constraints and constraint priority
2014-11-25 14:56:22 +02:00
Adrian Costina
87324d8a14
fmcomms1: Updated AC701 project with latest interrupts. Fixed constraints and constraint priority
2014-11-25 14:54:01 +02:00
Adrian Costina
b8ab2ff847
fmcomms1: updated common project
...
- increased the DMA FIFOs to 64
- added axi slices to the source and destination for DMAs
- for microblaze systems, increade the ad9643 dma data width at destination
- removed sys_fmc_dma_clk and used the sys_200m_clk instead for DMA data transfer
2014-11-25 14:51:42 +02:00
Istvan Csomortani
2bd154ad59
xfest14_zed: Update project to 2014.2
2014-11-25 12:53:42 +02:00
Istvan Csomortani
a1e67a5912
ad9625x2_fmc: dmafifo address width now is an argument of the process
2014-11-24 19:22:18 +02:00
Istvan Csomortani
660424ef99
fmcomms6_fmc: Update interrupts
2014-11-24 18:23:35 +02:00
Istvan Csomortani
56aefb62ed
fmcomms6_fmc: Cosmetic changes
...
Delete trailing white spaces, and fix alignment.
2014-11-24 18:23:34 +02:00